[llvm] [MachineCP] Correctly handle register masks and sub-registers (PR #122472)

[Vladimir Vereschaka via llvm-commits]

https://github.com/vvereschaka approved this pull request.

LGTM. I have tested these changes with the Aarch64 dev board. No problems have been noticed.

https://github.com/llvm/llvm-project/pull/122472