[llvm] [AMDGPU][True16][MC][NFC] add true16/fake16 test for gfx12 vop3c/3cx (PR #122316)

Thu Jan 9 08:56:17 PST 2025

llvmbot wrote:




@llvm/pr-subscribers-mc

Author: Brox Chen (broxigarchen)

<details>
<summary>Changes</summary>

This is a NFC. Added true16/fake16 test file for gfx12 vop3c/vop3cx and update it with +real-true16/-real-true16 flag.

This is for the upcoming true16 changes

---

Patch is 1.06 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/122316.diff


10 Files Affected:

- (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s (+6647) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s (+4-4) 
- (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8-fake16.s (+2975) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s (+4-4) 
- (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx-fake16.s (+3414) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s (+2-2) 
- (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16-fake16.s (+2595) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s (+2-2) 
- (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8-fake16.s (+897) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s (+2-2) 


``````````diff

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
new file mode 100644
index 00000000000000..ebf537724393fb
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
@@ -0,0 +1,6647 @@
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,-real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,-real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,-real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,-real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_class_f16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, 2.0 quad_perm:[3,2,1,0]
+// W32: v_cmp_class_f16_e64_dpp s5, v1, 2.0 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0xe8,0x01,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 row_mirror
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 row_half_mirror
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 row_shl:1
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 row_shl:15
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 row_shr:1
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 row_shr:15
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s5, v1, v2 row_ror:1
+// W32: v_cmp_class_f16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s105, v1, v2 row_ror:15
+// W32: v_cmp_class_f16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_class_f16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_class_f16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_class_f16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, 2.0 quad_perm:[3,2,1,0]
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, 2.0 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0xe8,0x01,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_mirror
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_half_mirror
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_shl:1
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_shl:15
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_shr:1
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_shr:15
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_ror:1
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_ror:15
+// W64: v_cmp_class_f16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_class_f16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_class_f16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_class_f16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f16_e64_dpp null, -|v255|, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_class_f16_e64_dpp null, -|v255|, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x01,0x7d,0xd4,0xfa,0xfe,0x03,0x20,0xff,0x6f,0x05,0x30]
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_class_f32_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, 2.0 quad_perm:[3,2,1,0]
+// W32: v_cmp_class_f32_e64_dpp s5, v1, 2.0 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0xe8,0x01,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 row_mirror
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 row_half_mirror
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 row_shl:1
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 row_shl:15
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 row_shr:1
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 row_shr:15
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s5, v1, v2 row_ror:1
+// W32: v_cmp_class_f32_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s105, v1, v2 row_ror:15
+// W32: v_cmp_class_f32_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_class_f32_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_class_f32_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_class_f32_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, 2.0 quad_perm:[3,2,1,0]
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, 2.0 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0xe8,0x01,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_mirror
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_half_mirror
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_shl:1
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_shl:15
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_shr:1
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_shr:15
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_ror:1
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_ror:15
+// W64: v_cmp_class_f32_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_class_f32_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_class_f32_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_class_f32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x7e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:25: error: invalid operand for instruction
+
+v_cmp_class_f32_e64_dpp null, -|v255|, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_class_f32_e64_dpp null, -|v255|, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x01,0x7e,0xd4,0xfa,0xfe,0x03,0x20,0xff,0x6f,0x05,0x30]
+
+v_cmp_eq_f16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_f16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x02,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_f16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_f16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x02,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_f16_e64_dpp s5, v1, 2.0 quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_f16_e64_dpp s5, v1, 2.0 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x02,0xd4,0xfa,0xe8,0x01,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_f16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_f16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x02,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_f16_e64_dpp s5, v1, v2 row_mirror
+// W32: v_cmp_eq_f16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/122316
