[llvm] [VectorCombine] Allow shuffling between vectors the same type but different element sizes (PR #121216)

via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 6 10:37:15 PST 2025


ParkHanbum wrote:

@RKSimon can I ask something? In this patch, I fixed the extract target to be placed at zero on the vector. If possible, does placing the extract idx in the vector equal to insert idx help with backend optimization?

https://github.com/llvm/llvm-project/pull/121216


More information about the llvm-commits mailing list