[llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 7 17:28:06 PST 2025
================
@@ -257,6 +257,9 @@ static OperandInfo getOperandInfo(const MachineOperand &MO,
// Vector Unit-Stride Instructions
// Vector Strided Instructions
/// Dest EEW encoded in the instruction and EMUL=(EEW/SEW)*LMUL
+ case RISCV::VLM_V:
+ case RISCV::VSM_V:
----------------
topperc wrote:
No tests for VSM?
https://github.com/llvm/llvm-project/pull/122030
More information about the llvm-commits
mailing list