[llvm] [TTI][AArch64] Detect OperandInfo from scalable splats. (PR #122469)

[Hassnaa Hamdi via llvm-commits]

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@@ -260,22 +260,22 @@ define void @udiv_uniformconst() {
 ; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %V16i8 = udiv <16 x i8> undef, splat (i8 7)
 ; CHECK-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V32i8 = udiv <32 x i8> undef, splat (i8 7)
 ; CHECK-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V64i8 = udiv <64 x i8> undef, splat (i8 7)
-; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %NV2i64 = udiv <vscale x 2 x i64> undef, splat (i64 7)
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %NV2i64 = udiv <vscale x 2 x i64> undef, splat (i64 7)
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hassnaaHamdi wrote:

Hi David,
I see why the cost could be changed, but I can't understand how it makes sense that the legal type of <vscal x 2 x i64> has higher cost than the a custom type like the one below: <vscale x 4 x i64>.

If expanding the div op for <vscal x 2 x i64> to the sequence (MULHS + ADD/SUB + SRA + SRL + ADD) results in higher cost, why do we do that expansion?

https://github.com/llvm/llvm-project/pull/122469