[llvm] [RISCV] Fix masked->unmasked peephole handling masked pseudos with no passthru (PR #122253)
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Thu Jan 9 03:07:18 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Luke Lau (lukel97)
<details>
<summary>Changes</summary>
Some masked pseudos like PseudoVCPOP_M_B8_MASK don't have a passthru, but in the masked->unmasked peephole we assumed the masked pseudo always had one.
This checks for a passthru first and fixes #<!-- -->122245.
---
Full diff: https://github.com/llvm/llvm-project/pull/122253.diff
2 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp (+12-8)
- (added) llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir (+16)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp b/llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
index 3521c689cf0c7c..bb2d1717c3b1e9 100644
--- a/llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
@@ -460,13 +460,13 @@ bool RISCVVectorPeephole::convertToUnmasked(MachineInstr &MI) const {
[[maybe_unused]] const bool HasPolicyOp =
RISCVII::hasVecPolicyOp(MCID.TSFlags);
const bool HasPassthru = RISCVII::isFirstDefTiedToFirstUse(MCID);
-#ifndef NDEBUG
const MCInstrDesc &MaskedMCID = TII->get(MI.getOpcode());
assert(RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags) ==
RISCVII::hasVecPolicyOp(MCID.TSFlags) &&
"Masked and unmasked pseudos are inconsistent");
assert(HasPolicyOp == HasPassthru && "Unexpected pseudo structure");
-#endif
+ assert(!(HasPassthru && !RISCVII::isFirstDefTiedToFirstUse(MaskedMCID)) &&
+ "Unmasked with passthru but masked with no passthru?");
(void)HasPolicyOp;
MI.setDesc(MCID);
@@ -478,12 +478,16 @@ bool RISCVVectorPeephole::convertToUnmasked(MachineInstr &MI) const {
// The unmasked pseudo will no longer be constrained to the vrnov0 reg class,
// so try and relax it to vr.
MRI->recomputeRegClass(MI.getOperand(0).getReg());
- unsigned PassthruOpIdx = MI.getNumExplicitDefs();
- if (HasPassthru) {
- if (MI.getOperand(PassthruOpIdx).getReg() != RISCV::NoRegister)
- MRI->recomputeRegClass(MI.getOperand(PassthruOpIdx).getReg());
- } else
- MI.removeOperand(PassthruOpIdx);
+
+ // If the original masked pseudo had a passthru, relax it or remove it.
+ if (RISCVII::isFirstDefTiedToFirstUse(MaskedMCID)) {
+ unsigned PassthruOpIdx = MI.getNumExplicitDefs();
+ if (HasPassthru) {
+ if (MI.getOperand(PassthruOpIdx).getReg() != RISCV::NoRegister)
+ MRI->recomputeRegClass(MI.getOperand(PassthruOpIdx).getReg());
+ } else
+ MI.removeOperand(PassthruOpIdx);
+ }
return true;
}
diff --git a/llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir b/llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir
new file mode 100644
index 00000000000000..97654c050f81cb
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir
@@ -0,0 +1,16 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc %s -o - -mtriple=riscv64 -mattr=+v -run-pass=riscv-vector-peephole -verify-machineinstrs | FileCheck %s
+
+# Take into account that the masked vcpop pseudo doesn't have a passthru
+---
+name: vcpop.m
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vcpop.m
+ ; CHECK: %allones:vr = PseudoVMSET_M_B64 $noreg, 0 /* e8 */
+ ; CHECK-NEXT: $v0 = COPY %allones
+ ; CHECK-NEXT: [[PseudoVCPOP_M_B64_:%[0-9]+]]:gpr = PseudoVCPOP_M_B64 $noreg, 42, 0 /* e8 */
+ %allones:vr = PseudoVMSET_M_B64 $noreg, 0
+ $v0 = COPY %allones
+ %2:gpr = PseudoVCPOP_M_B64_MASK $noreg, $v0, 42, 0
+...
``````````
</details>
https://github.com/llvm/llvm-project/pull/122253
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