[llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)

[via llvm-commits]

https://github.com/abhishek-kaushik22 updated https://github.com/llvm/llvm-project/pull/121809

>From 9f62f4105035091b57c6912a22f3e0d7f72bdf2b Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Tue, 7 Jan 2025 03:19:13 +0530
Subject: [PATCH 1/3] Update LegalizeVectorOps.cpp

---
 .../SelectionDAG/LegalizeVectorOps.cpp        | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 154c8aea6bcd17..2be9239202b021 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -1776,6 +1776,27 @@ void VectorLegalizer::ExpandUINT_TO_FLOAT(SDNode *Node,
   assert((BW == 64 || BW == 32) &&
          "Elements in vector-UINT_TO_FP must be 32 or 64 bits wide");
 
+  // If STRICT_/FMUL is not supported by the target (in case of f16) replace the
+  // UINT_TO_FP with a larger float and round to the smaller type
+  if ((!IsStrict && TLI.getOperationAction(ISD::FMUL, Node->getValueType(0)) ==
+                        TargetLowering::Expand) ||
+      (IsStrict &&
+       TLI.getOperationAction(ISD::STRICT_FMUL, Node->getValueType(0)) ==
+           TargetLowering::Expand)) {
+    EVT FPVT = BW == 32 ? MVT::f32 : MVT::f64;
+    SDLoc DL(Node);
+    unsigned Round = IsStrict ? ISD::STRICT_FP_ROUND : ISD::FP_ROUND;
+    unsigned UIToFP = IsStrict ? ISD::STRICT_UINT_TO_FP : ISD::UINT_TO_FP;
+    SDValue Result = DAG.getNode(
+        Round, DL, Node->getValueType(0),
+        DAG.getNode(UIToFP, DL, VT.changeVectorElementType(FPVT), Src),
+        DAG.getTargetConstant(
+            0, DL,
+            DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout())));
+    Results.push_back(Result);
+    return;
+  }
+
   SDValue HalfWord = DAG.getConstant(BW / 2, DL, VT);
 
   // Constants to clear the upper part of the word.

>From 74f53279c202d08e0442ae3681904d583209264a Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Tue, 7 Jan 2025 03:38:22 +0530
Subject: [PATCH 2/3] Update LegalizeVectorOps.cpp

---
 llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 966c9fff5750d3..17605eb5034685 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -1779,18 +1779,17 @@ void VectorLegalizer::ExpandUINT_TO_FLOAT(SDNode *Node,
 
   // If STRICT_/FMUL is not supported by the target (in case of f16) replace the
   // UINT_TO_FP with a larger float and round to the smaller type
-  if ((!IsStrict && TLI.getOperationAction(ISD::FMUL, Node->getValueType(0)) ==
-                        TargetLowering::Expand) ||
-      (IsStrict &&
-       TLI.getOperationAction(ISD::STRICT_FMUL, Node->getValueType(0)) ==
-           TargetLowering::Expand)) {
+  if ((!IsStrict &&
+       TLI.getOperationAction(ISD::FMUL, DstVT) == TargetLowering::Expand) ||
+      (IsStrict && TLI.getOperationAction(ISD::STRICT_FMUL, DstVT) ==
+                       TargetLowering::Expand)) {
     EVT FPVT = BW == 32 ? MVT::f32 : MVT::f64;
     SDLoc DL(Node);
     unsigned Round = IsStrict ? ISD::STRICT_FP_ROUND : ISD::FP_ROUND;
     unsigned UIToFP = IsStrict ? ISD::STRICT_UINT_TO_FP : ISD::UINT_TO_FP;
     SDValue Result = DAG.getNode(
-        Round, DL, Node->getValueType(0),
-        DAG.getNode(UIToFP, DL, VT.changeVectorElementType(FPVT), Src),
+        Round, DL, DstVT,
+        DAG.getNode(UIToFP, DL, SrcVT.changeVectorElementType(FPVT), Src),
         DAG.getTargetConstant(
             0, DL,
             DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout())));

>From 40ca7cf0f200e977906d198c176d2f16e76cb8e3 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Tue, 7 Jan 2025 13:38:23 +0530
Subject: [PATCH 3/3] Update LegalizeVectorOps.cpp

---
 .../SelectionDAG/LegalizeVectorOps.cpp        | 28 ++++++++++++-------
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 17605eb5034685..33621201fe1ef3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -1784,16 +1784,24 @@ void VectorLegalizer::ExpandUINT_TO_FLOAT(SDNode *Node,
       (IsStrict && TLI.getOperationAction(ISD::STRICT_FMUL, DstVT) ==
                        TargetLowering::Expand)) {
     EVT FPVT = BW == 32 ? MVT::f32 : MVT::f64;
-    SDLoc DL(Node);
-    unsigned Round = IsStrict ? ISD::STRICT_FP_ROUND : ISD::FP_ROUND;
-    unsigned UIToFP = IsStrict ? ISD::STRICT_UINT_TO_FP : ISD::UINT_TO_FP;
-    SDValue Result = DAG.getNode(
-        Round, DL, DstVT,
-        DAG.getNode(UIToFP, DL, SrcVT.changeVectorElementType(FPVT), Src),
-        DAG.getTargetConstant(
-            0, DL,
-            DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout())));
-    Results.push_back(Result);
+    SDValue UIToFP;
+    SDValue Result;
+    SDValue TargetZero = DAG.getIntPtrConstant(0, DL, /*isTarget=*/true);
+    if (IsStrict) {
+      UIToFP = DAG.getNode(ISD::STRICT_UINT_TO_FP, DL,
+                           {SrcVT.changeVectorElementType(FPVT), MVT::Other},
+                           {Node->getOperand(0), Src});
+      Result = DAG.getNode(ISD::STRICT_FP_ROUND, DL, {DstVT, MVT::Other},
+                           {Node->getOperand(0), UIToFP, TargetZero});
+      Results.push_back(Result);
+      Results.push_back(Result.getValue(1));
+    } else {
+      UIToFP = DAG.getNode(ISD::UINT_TO_FP, DL,
+                           SrcVT.changeVectorElementType(FPVT), Src);
+      Result = DAG.getNode(ISD::FP_ROUND, DL, DstVT, UIToFP, TargetZero);
+      Results.push_back(Result);
+    }
+
     return;
   }