[llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)

[Philip Reames via llvm-commits]

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@@ -257,16 +257,27 @@ static OperandInfo getOperandInfo(const MachineOperand &MO,
   // Vector Unit-Stride Instructions
   // Vector Strided Instructions
   /// Dest EEW encoded in the instruction and EMUL=(EEW/SEW)*LMUL
+  case RISCV::VLM_V:
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preames wrote:

Please separate the mask instructions to their own review.  They're conceptual separate.  

https://github.com/llvm/llvm-project/pull/121705