[llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)

[via llvm-commits]

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@@ -1777,6 +1777,26 @@ void VectorLegalizer::ExpandUINT_TO_FLOAT(SDNode *Node,
   assert((BW == 64 || BW == 32) &&
          "Elements in vector-UINT_TO_FP must be 32 or 64 bits wide");
 
+  // If STRICT_/FMUL is not supported by the target (in case of f16) replace the
+  // UINT_TO_FP with a larger float and round to the smaller type
+  if ((!IsStrict &&
+       TLI.getOperationAction(ISD::FMUL, DstVT) == TargetLowering::Expand) ||
+      (IsStrict && TLI.getOperationAction(ISD::STRICT_FMUL, DstVT) ==
+                       TargetLowering::Expand)) {
+    EVT FPVT = BW == 32 ? MVT::f32 : MVT::f64;
+    SDLoc DL(Node);
+    unsigned Round = IsStrict ? ISD::STRICT_FP_ROUND : ISD::FP_ROUND;
+    unsigned UIToFP = IsStrict ? ISD::STRICT_UINT_TO_FP : ISD::UINT_TO_FP;
+    SDValue Result = DAG.getNode(
+        Round, DL, DstVT,
+        DAG.getNode(UIToFP, DL, SrcVT.changeVectorElementType(FPVT), Src),
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abhishek-kaushik22 wrote:

Sorry I missed that. Thanks for pointing it out.

https://github.com/llvm/llvm-project/pull/121809