[llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Chinmay Deshpande via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 9 05:18:30 PST 2025
================
@@ -16992,6 +17021,33 @@ bool SITargetLowering::checkForPhysRegDependency(
return false;
}
+/// Check if it is profitable to hoist instruction in then/else to if.
+bool SITargetLowering::isProfitableToHoist(Instruction *I) const {
+ if (!I->hasOneUse())
+ return true;
+
+ Instruction *User = I->user_back();
+ // TODO: Add more patterns that are not profitable to hoist
+ switch (I->getOpcode()) {
+ case Instruction::FMul: {
+ if (User->getOpcode() != Instruction::FSub &&
+ User->getOpcode() != Instruction::FAdd)
+ return true;
+
+ const TargetOptions &Options = getTargetMachine().Options;
+ const Function *F = I->getFunction();
+
+ return ((!I->hasAllowContract() || !User->hasAllowContract()) &&
+ Options.AllowFPOpFusion != FPOpFusion::Fast &&
+ !Options.UnsafeFPMath) ||
----------------
chinmaydd wrote:
I believe existing code takes care of this. This is without pushing the demorgan through -
```c++
return !((I->hasAllowContract() && User->hasAllowContract()) ||
Options.AllowFPOpFusion == FPOpFusion::Fast ||
Options.UnsafeFPMath) &&
isFMAFasterThanFMulAndFAdd(*F, User->getType());
```
https://github.com/llvm/llvm-project/pull/121465
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