[llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 10 13:14:53 PST 2025
================
@@ -2229,6 +2229,19 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
return BitOp;
}
+ // fshal(X, 0, Y) --> shl(X, and(Y, BitWidth - 1))
+ // fshal(X, 0, Y) --> Shl(X, Y) if Y within the range 0 to type bit width
+ if (match(Op1, m_ZeroInt())) {
+ unsigned BitWidth = Ty->getScalarSizeInBits();
+ Value *Op2 = II->getArgOperand(2);
+ if (auto Range = II->getRange(); Range && Range->getLower().sge(0) &&
+ Range->getUpper().sle(BitWidth)) {
+ return BinaryOperator::CreateShl(Op0, Op2);
+ }
----------------
AmrDeveloper wrote:
Thank you, Done
https://github.com/llvm/llvm-project/pull/122362
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