[llvm] [Xtensa] Implement Windowed Register Option. (PR #121118)

[Andrei Safronov via llvm-commits]

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@@ -73,17 +73,42 @@ static DecodeStatus DecodeARRegisterClass(MCInst &Inst, uint64_t RegNo,
   return MCDisassembler::Success;
 }
 
-static const unsigned SRDecoderTable[] = {Xtensa::SAR, 3};
+// Verify SR
+bool CheckRegister(unsigned RegNo, MCSubtargetInfo STI) {
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andreisfr wrote:

I rewrote the function code and name. This function is almost the same as "checkRegister" in asm parser, but I plan to make version asm parser more complex in future commits with additional arguments.

https://github.com/llvm/llvm-project/pull/121118