[llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 8 05:36:06 PST 2025
================
@@ -15,13 +15,45 @@ body: |
...
---
-name: test_machine_cse_op_inline_const
+name: test_machine_cse_op_const_v_add_nc_u16
body: |
- ; GCN-LABEL: name: test_machine_cse_op_inline_const
+ ; GCN-LABEL: name: test_machine_cse_op_const_v_add_nc_u16
; GCN: %0:vgpr_32 = V_ADD_NC_U16_e64 0, 64, 0, -3, 1, 0, implicit $mode, implicit $exec
; GCN-NEXT: DS_WRITE2_B32_gfx9 undef %2:vgpr_32, %0, %0, 0, 1, 0, implicit $exec
bb.0:
%1:vgpr_32 = V_ADD_NC_U16_e64 0, 64, 0, -3, 1, 0, implicit $mode, implicit $exec
%2:vgpr_32 = V_ADD_NC_U16_e64 0, -3, 0, 64, 1, 0, implicit $mode, implicit $exec
DS_WRITE2_B32_gfx9 undef %4:vgpr_32, %1, %2, 0, 1, 0, implicit $exec
...
+
+---
+name: test_machine_cse_op_v_fma_f16
+tracksRegLiveness: true
+body: |
+ ; GCN-LABEL: name: test_machine_cse_op_v_fma_f16
+ ; GCN: %3:vgpr_32 = nofpexcept V_FMA_F16_e64 0, %0, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: DS_WRITE2_B32_gfx9 undef %5:vgpr_32, %3, %3, 0, 1, 0, implicit $exec
+ bb.0:
+ liveins: $vgpr0, $vgpr1, $vgpr2
+ %0:vgpr_32 = COPY $vgpr0
+ %1:vgpr_32 = COPY $vgpr1
+ %2:vgpr_32 = COPY $vgpr2
+ %3:vgpr_32 = nofpexcept V_FMA_F16_e64 0, %0, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
+ %4:vgpr_32 = nofpexcept V_FMA_F16_e64 0, %1, 0, %0, 0, %2, 0, 0, implicit $mode, implicit $exec
+ DS_WRITE2_B32_gfx9 undef %5:vgpr_32, %3, %4, 0, 1, 0, implicit $exec
+...
+
+---
+name: test_machine_cse_op_const_v_fma_f16
+tracksRegLiveness: true
+body: |
+ ; GCN-LABEL: name: test_machine_cse_op_const_v_fma_f16
+ ; GCN: %1:vgpr_32 = nofpexcept V_FMA_F16_e64 0, 3481272320, 0, 1, 0, %0, 0, 0, implicit $mode, implicit $exec
+ ; GCN-NEXT: DS_WRITE2_B32_gfx9 undef %3:vgpr_32, %1, %1, 0, 1, 0, implicit $exec
+ bb.0:
+ liveins: $vgpr0, $vgpr1, $vgpr2
+ %0:vgpr_32 = COPY $vgpr0
+ %1:vgpr_32 = nofpexcept V_FMA_F16_e64 0, 1, 0, 3481272320, 0, %0, 0, 0, implicit $mode, implicit $exec
+ %2:vgpr_32 = nofpexcept V_FMA_F16_e64 0, 3481272320, 0, 1, 0, %0, 0, 0, implicit $mode, implicit $exec
+ DS_WRITE2_B32_gfx9 undef %3:vgpr_32, %1, %2, 0, 1, 0, implicit $exec
+...
----------------
arsenm wrote:
Test the src0X cases? I'm not familiar with those
https://github.com/llvm/llvm-project/pull/121326
More information about the llvm-commits
mailing list