[llvm] 29e5c1c - [Hexagon] Fix test after 9d7df23f4d6537752854d54b0c4c583512b930d0
Alina Sbirlea via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 10 13:04:35 PST 2025
Author: Alina Sbirlea
Date: 2025-01-10T13:03:28-08:00
New Revision: 29e5c1c92782ff7d455878747fb1dc1967ff607f
URL: https://github.com/llvm/llvm-project/commit/29e5c1c92782ff7d455878747fb1dc1967ff607f
DIFF: https://github.com/llvm/llvm-project/commit/29e5c1c92782ff7d455878747fb1dc1967ff607f.diff
LOG: [Hexagon] Fix test after 9d7df23f4d6537752854d54b0c4c583512b930d0
Added:
Modified:
llvm/test/CodeGen/Hexagon/isel/isel-tfrrp.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/Hexagon/isel/isel-tfrrp.ll b/llvm/test/CodeGen/Hexagon/isel/isel-tfrrp.ll
index b2a9f732bdddc7..6351406264e573 100644
--- a/llvm/test/CodeGen/Hexagon/isel/isel-tfrrp.ll
+++ b/llvm/test/CodeGen/Hexagon/isel/isel-tfrrp.ll
@@ -2,6 +2,7 @@
; The constant 0 is generated by a transfer immediate instruction.
; RUN: llc -march=hexagon -debug-only=isel 2>&1 < %s - | FileCheck %s
+; REQUIRES: asserts
; CHECK: [[R0:%[0-9]+]]:intregs = A2_tfrsi 0
; CHECK-NEXT: predregs = C2_tfrrp killed [[R0]]:intregs
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