[llvm] [NVPTX] Lower bfloat16 add/mul/sub as fma on SM80 (PR #121065)

[Matt Arsenault via llvm-commits]

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@@ -17579,15 +17582,14 @@ template <class MatchContextClass> SDValue DAGCombiner::visitFMA(SDNode *N) {
       AddToWorklist(RHSNeg.getNode());
       return matcher.getNode(ISD::FADD, DL, VT, N2, RHSNeg);
     }
-
-    // fma (fneg x), K, y -> fma x -K, y
-    if (matcher.match(N0, ISD::FNEG) &&
-        (TLI.isOperationLegal(ISD::ConstantFP, VT) ||
-         (N1.hasOneUse() &&
-          !TLI.isFPImmLegal(N1CFP->getValueAPF(), VT, ForCodeSize)))) {
-      return matcher.getNode(ISD::FMA, DL, VT, N0.getOperand(0),
-                             matcher.getNode(ISD::FNEG, DL, VT, N1), N2);
-    }
+  }
+  // fma (fneg x), K, y -> fma x -K, y
+  if (N1CFP && matcher.match(N0, ISD::FNEG) &&
+      (TLI.isOperationLegal(ISD::ConstantFP, VT) ||
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arsenm wrote:

Since ConstantFP doesn't get used for vectors, this won't handle them correctly. I thought we had a helper for this but I can't seem to find it 

https://github.com/llvm/llvm-project/pull/121065