[clang] [llvm] [Clang][LLVM][AArch64]Add new feature SSVE-BitPerm (PR #121947)

[via llvm-commits]

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@@ -86,10 +87,11 @@
 // CHECK-NEXT:     sve-aes2            FEAT_SVE_AES2                                          Enable Armv9.6-A SVE multi-vector AES and multi-vector quadword polynomial multiply instructions
 // CHECK-NEXT:     sve-b16b16          FEAT_SVE_B16B16                                        Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions
 // CHECK-NEXT:     sve-bfscale         FEAT_SVE_BFSCALE                                       Enable Armv9.6-A SVE BFloat16 scaling instructions
+// CHECK-NEXT:     sve-bitperm         FEAT_SVE_BitPerm                                       Enable bit permutation SVE2 instructions
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CarolineConcatto wrote:

I am not sure we should change, previous message already had saying it was SVE2, moreover these instructions requires SVE2. 

https://github.com/llvm/llvm-project/pull/121947