[llvm] c05fc9b - [AArch64] Fix sebvector -> subvector typo. NFC

David Green via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 9 04:10:47 PST 2025


Author: David Green
Date: 2025-01-09T12:10:43Z
New Revision: c05fc9b6d5559cc37e389f20a6c0c7b6f291b70e

URL: https://github.com/llvm/llvm-project/commit/c05fc9b6d5559cc37e389f20a6c0c7b6f291b70e
DIFF: https://github.com/llvm/llvm-project/commit/c05fc9b6d5559cc37e389f20a6c0c7b6f291b70e.diff

LOG: [AArch64] Fix sebvector -> subvector typo. NFC

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 25b6731cb313a1..29ea098386cec1 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -4739,7 +4739,7 @@ InstructionCost AArch64TTIImpl::getShuffleCost(
 
   Kind = improveShuffleKindFromMask(Kind, Mask, Tp, Index, SubTp);
   bool IsExtractSubvector = Kind == TTI::SK_ExtractSubvector;
-  // A sebvector extract can be implemented with a ext (or trivial extract, if
+  // A subvector extract can be implemented with an ext (or trivial extract, if
   // from lane 0). This currently only handles low or high extracts to prevent
   // SLP vectorizer regressions.
   if (IsExtractSubvector && LT.second.isFixedLengthVector()) {


        


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