[llvm] [RISCV][VLOPT] Add vector fp-conversion instruction to isSupportedInstr (PR #122033)

[Luke Lau via llvm-commits]

================
@@ -962,6 +962,32 @@ static bool isSupportedInstr(const MachineInstr &MI) {
   case RISCV::VIOTA_M:
   case RISCV::VID_V:
     return true;
+
+  // Single-Width Floating-Point/Integer Type-Convert Instructions
+  case RISCV::VFCVT_XU_F_V:
+  case RISCV::VFCVT_X_F_V:
+  case RISCV::VFCVT_RTZ_XU_F_V:
+  case RISCV::VFCVT_RTZ_X_F_V:
+  case RISCV::VFCVT_F_XU_V:
+  case RISCV::VFCVT_F_X_V:
+  // Widening Floating-Point/Integer Type-Convert Instructions
+  case RISCV::VFWCVT_XU_F_V:
+  case RISCV::VFWCVT_X_F_V:
+  case RISCV::VFWCVT_RTZ_XU_F_V:
+  case RISCV::VFWCVT_RTZ_X_F_V:
+  case RISCV::VFWCVT_F_XU_V:
+  case RISCV::VFWCVT_F_X_V:
+  case RISCV::VFWCVT_F_F_V:
+  // Narrowing Floating-Point/Integer Type-Convert Instructions
+  case RISCV::VFNCVT_XU_F_W:
+  case RISCV::VFNCVT_X_F_W:
+  case RISCV::VFNCVT_RTZ_XU_F_W:
+  case RISCV::VFNCVT_RTZ_X_F_W:
+  case RISCV::VFNCVT_F_XU_W:
+  case RISCV::VFNCVT_F_X_W:
+  case RISCV::VFNCVT_F_F_W:
+  case RISCV::VFNCVT_ROD_F_F_W:
+    return MI.getFlags() & MachineInstr::NoFPExcept;
----------------
lukel97 wrote:

It might be safer to check `MI.mayRaiseFPException()` in `isCandidate` so that it checks every instruction, not just the ones here

https://github.com/llvm/llvm-project/pull/122033