[llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #120690)

[Matt Arsenault via llvm-commits]

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@@ -70,6 +71,7 @@ class SIPreAllocateWWMRegsLegacy : public MachineFunctionPass {
     AU.addRequired<LiveIntervalsWrapperPass>();
     AU.addRequired<VirtRegMapWrapperLegacy>();
     AU.addRequired<LiveRegMatrixWrapperLegacy>();
+    AU.addRequired<MachineRegisterClassInfoWrapperPass>();
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arsenm wrote:

Can you add a todo to update RCI with the additional reserved registers the pass sets 

https://github.com/llvm/llvm-project/pull/120690