[llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-x86

Author: None (soumyaGhoshh)

<details>
<summary>Changes</summary>

fixes #<!-- -->121908

This pull request resolves issue #<!-- -->121908 by adding proper parentheses in X86ISelLowering.cpp to follow operator precedence rules. This change ensures better code clarity and avoids ambiguity.

<img width="561" alt="Screenshot 2025-01-07 at 5 58 21 PM" src="https://github.com/user-attachments/assets/8d1594af-c2b6-4150-9bb2-b541654ed95e" />

This is my first contribution to LLVM. Please let me know if I missed any steps or made any mistakes. I’d greatly appreciate feedback to improve for future contributions!

Thank you for reviewing this pull request.

---
Full diff: https://github.com/llvm/llvm-project/pull/121954.diff


1 Files Affected:

- (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 68bdeb1cebeb9c..15408b13e44b6f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -42418,7 +42418,7 @@ static SDValue combineTargetShuffle(SDValue N, const SDLoc &DL,
       // Canonicalize to VPERMV if both sources are the same.
       if (V1 == V2) {
         for (int &M : Mask)
-          M = (M < 0 ? M : M & Mask.size() - 1);
+          M = (M < 0 ? M : M & (Mask.size() - 1));
         SDValue NewMask = getConstVector(Mask, MaskVT, DAG, DL,
                                          /*IsMask=*/true);
         return DAG.getNode(X86ISD::VPERMV, DL, VT, NewMask, N.getOperand(0));

``````````

</details>


https://github.com/llvm/llvm-project/pull/121954