[llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)

[Yingwei Zheng via llvm-commits]

================
@@ -2674,10 +2674,41 @@ Instruction *InstCombinerImpl::foldICmpShrConstant(ICmpInst &Cmp,
 Instruction *InstCombinerImpl::foldICmpSRemConstant(ICmpInst &Cmp,
                                                     BinaryOperator *SRem,
                                                     const APInt &C) {
+  const ICmpInst::Predicate Pred = Cmp.getPredicate();
+  if (Pred == ICmpInst::ICMP_UGT || Pred == ICmpInst::ICMP_ULT) {
+    // Canonicalize unsigned predicates to signed:
+    // (X % DivisorC) ugt C -> (X % DivisorC) slt 0
+    //   iff (C slt 0 ? ~C : C) uge abs(DivisorC)-1
+    // (X % DivisorC) ult C+1 -> (X % DivisorC) sgt -1
+    //   iff (C+1 slt 0 ? ~C : C) uge abs(DivisorC)->
----------------
dtcxzyw wrote:

```suggestion
    //   iff (C+1 slt 0 ? ~C : C) uge abs(DivisorC)
```

https://github.com/llvm/llvm-project/pull/122520