[llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)

[Amr Hesham via llvm-commits]

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@@ -2229,6 +2229,14 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
         return BitOp;
     }
 
+    // fshl(X, 0, Y) --> shl(X, and(Y, BitWidth - 1)) if bitwidth is a
+    // power-of-2
+    if (isPowerOf2_32(BitWidth) && match(Op1, m_ZeroInt())) {
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AmrDeveloper wrote:

But we already have a check that it's `fshl`

https://github.com/llvm/llvm-project/blob/212cba0ef37dd3b2a253c063240370de42fc67c1/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp#L2205-L2208

https://github.com/llvm/llvm-project/pull/122362