[llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)

Jacob Young via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 11 04:21:12 PST 2025


https://github.com/jacobly0 updated https://github.com/llvm/llvm-project/pull/122520

>From d84b865ac2339cd68e8d14c8b267abd605c1bde1 Mon Sep 17 00:00:00 2001
From: Jacob Young <jacobly0 at users.noreply.github.com>
Date: Fri, 10 Jan 2025 14:00:49 -0500
Subject: [PATCH 1/2] [InstCombine][NFC] precommit tests for signed floor
 division

---
 llvm/test/Transforms/InstCombine/add.ll | 34 +++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 222f87fa3a5f18..5684bee06b9164 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -3018,6 +3018,40 @@ define i32 @floor_sdiv_wrong_op(i32 %x, i32 %y) {
   ret i32 %r
 }
 
+define i32 @floor_sdiv_using_srem_by_8(i32 %x) {
+; CHECK-LABEL: @floor_sdiv_using_srem_by_8(
+; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 8
+; CHECK-NEXT:    [[R:%.*]] = srem i32 [[X]], 8
+; CHECK-NEXT:    [[I:%.*]] = icmp ugt i32 [[R]], -2147483648
+; CHECK-NEXT:    [[S:%.*]] = sext i1 [[I]] to i32
+; CHECK-NEXT:    [[F:%.*]] = add nsw i32 [[D]], [[S]]
+; CHECK-NEXT:    ret i32 [[F]]
+;
+  %d = sdiv i32 %x, 8
+  %r = srem i32 %x, 8
+  %i = icmp ugt i32 %r, -2147483648
+  %s = sext i1 %i to i32
+  %f = add i32 %d, %s
+  ret i32 %f
+}
+
+define i32 @floor_sdiv_using_srem_by_2(i32 %x) {
+; CHECK-LABEL: @floor_sdiv_using_srem_by_2(
+; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 2
+; CHECK-NEXT:    [[R:%.*]] = srem i32 [[X]], 2
+; CHECK-NEXT:    [[I:%.*]] = icmp ugt i32 [[R]], -2147483648
+; CHECK-NEXT:    [[S:%.*]] = sext i1 [[I]] to i32
+; CHECK-NEXT:    [[F:%.*]] = add nsw i32 [[D]], [[S]]
+; CHECK-NEXT:    ret i32 [[F]]
+;
+  %d = sdiv i32 %x, 2
+  %r = srem i32 %x, 2
+  %i = icmp ugt i32 %r, -2147483648
+  %s = sext i1 %i to i32
+  %f = add i32 %d, %s
+  ret i32 %f
+}
+
 ; (X s>> (BW - 1)) + (zext (X s> 0)) --> (X s>> (BW - 1)) | (zext (X != 0))
 
 define i8 @signum_i8_i8(i8 %x) {

>From f98ced20d22b76c9c070a3dfc3c4ba5306bd32fc Mon Sep 17 00:00:00 2001
From: Jacob Young <jacobly0 at users.noreply.github.com>
Date: Sat, 11 Jan 2025 07:11:09 -0500
Subject: [PATCH 2/2] [InstCombine] fold unsigned predicates to signed on srem
 result

This allows optimization of more signed floor implementations when the
divisor is a known power of two to an arithmetic shift.

Proof for the implemented optimizations:
https://alive2.llvm.org/ce/z/2msAMA

Proof for the test cases:
https://alive2.llvm.org/ce/z/M_PBjw

working
---
 .../InstCombine/InstCombineCompares.cpp       | 33 ++++++++++++++++++-
 llvm/test/Transforms/InstCombine/add.ll       | 12 ++-----
 2 files changed, 34 insertions(+), 11 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 2e457257599493..d9d3938df15a92 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -2674,10 +2674,41 @@ Instruction *InstCombinerImpl::foldICmpShrConstant(ICmpInst &Cmp,
 Instruction *InstCombinerImpl::foldICmpSRemConstant(ICmpInst &Cmp,
                                                     BinaryOperator *SRem,
                                                     const APInt &C) {
+  const ICmpInst::Predicate Pred = Cmp.getPredicate();
+  if (Pred == ICmpInst::ICMP_UGT || Pred == ICmpInst::ICMP_ULT) {
+    // Canonicalize unsigned predicates to signed:
+    // (X % DivisorC) ugt C -> (X % DivisorC) slt 0
+    //   iff abs(DivisorC) ule (C slt 0 ? ~C : C)+1
+    // (X % DivisorC) ult C+1 -> (X % DivisorC) sgt -1
+    //   iff abs(DivisorC) ule (C+1 slt 0 ? ~C : C)+1
+
+    const APInt *DivisorC;
+    if (!match(SRem->getOperand(1), m_APInt(DivisorC)))
+      return nullptr;
+
+    APInt NormalizedC = C;
+    assert(!NormalizedC.isZero() &&
+           "srem X, 0 should have been simplified already.");
+    if (Pred == ICmpInst::ICMP_ULT)
+      --NormalizedC;
+    if (C.isNegative())
+      NormalizedC.flipAllBits();
+    assert(!NormalizedC.isMaxValue() &&
+           "srem i1 X, -1 should have been simplified already.");
+    ++NormalizedC;
+    if (!DivisorC->abs().ule(NormalizedC))
+      return nullptr;
+
+    Type *Ty = SRem->getType();
+    if (Pred == ICmpInst::ICMP_UGT)
+      return new ICmpInst(ICmpInst::ICMP_SLT, SRem,
+                          ConstantInt::getNullValue(Ty));
+    return new ICmpInst(ICmpInst::ICMP_SGT, SRem,
+                        ConstantInt::getAllOnesValue(Ty));
+  }
   // Match an 'is positive' or 'is negative' comparison of remainder by a
   // constant power-of-2 value:
   // (X % pow2C) sgt/slt 0
-  const ICmpInst::Predicate Pred = Cmp.getPredicate();
   if (Pred != ICmpInst::ICMP_SGT && Pred != ICmpInst::ICMP_SLT &&
       Pred != ICmpInst::ICMP_EQ && Pred != ICmpInst::ICMP_NE)
     return nullptr;
diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 5684bee06b9164..495f99824652d6 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -3020,11 +3020,7 @@ define i32 @floor_sdiv_wrong_op(i32 %x, i32 %y) {
 
 define i32 @floor_sdiv_using_srem_by_8(i32 %x) {
 ; CHECK-LABEL: @floor_sdiv_using_srem_by_8(
-; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 8
-; CHECK-NEXT:    [[R:%.*]] = srem i32 [[X]], 8
-; CHECK-NEXT:    [[I:%.*]] = icmp ugt i32 [[R]], -2147483648
-; CHECK-NEXT:    [[S:%.*]] = sext i1 [[I]] to i32
-; CHECK-NEXT:    [[F:%.*]] = add nsw i32 [[D]], [[S]]
+; CHECK-NEXT:    [[F:%.*]] = ashr i32 [[X:%.*]], 3
 ; CHECK-NEXT:    ret i32 [[F]]
 ;
   %d = sdiv i32 %x, 8
@@ -3037,11 +3033,7 @@ define i32 @floor_sdiv_using_srem_by_8(i32 %x) {
 
 define i32 @floor_sdiv_using_srem_by_2(i32 %x) {
 ; CHECK-LABEL: @floor_sdiv_using_srem_by_2(
-; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 2
-; CHECK-NEXT:    [[R:%.*]] = srem i32 [[X]], 2
-; CHECK-NEXT:    [[I:%.*]] = icmp ugt i32 [[R]], -2147483648
-; CHECK-NEXT:    [[S:%.*]] = sext i1 [[I]] to i32
-; CHECK-NEXT:    [[F:%.*]] = add nsw i32 [[D]], [[S]]
+; CHECK-NEXT:    [[F:%.*]] = ashr i32 [[X:%.*]], 1
 ; CHECK-NEXT:    ret i32 [[F]]
 ;
   %d = sdiv i32 %x, 2



More information about the llvm-commits mailing list