[llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #120690)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 12 04:17:03 PST 2025


================
@@ -345,9 +347,11 @@
 ; GCN-O1-NEXT:        Slot index numbering
 ; GCN-O1-NEXT:        Live Interval Analysis
 ; GCN-O1-NEXT:        Machine Natural Loop Construction
+; GCN-O1-NEXT:        Machine Register Class Info Analysis
 ; GCN-O1-NEXT:        Register Coalescer
 ; GCN-O1-NEXT:        Rename Disconnected Subregister Components
 ; GCN-O1-NEXT:        Rewrite Partial Register Uses
+; GCN-O1-NEXT:        Machine Register Class Info Analysis
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arsenm wrote:

Unnecessary recalculation here 

https://github.com/llvm/llvm-project/pull/120690


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