The Week Of Monday 27 January 2025 Archives by thread
Starting: Mon Jan 27 00:11:25 PST 2025
Ending: Sun Feb 2 23:55:30 PST 2025
Messages: 4826
- [llvm] Reapply "[msan] Add avx512-intrinsics.ll and avx512-intrinsics-upgrade.ll test case (#123980)" (PR #124500)
Thurston Dang via llvm-commits
- [llvm] [SelectionDAG] Replace `INSERT_SUBVECTOR` with series of `INSERT_VECTOR_ELT` (PR #124420)
via llvm-commits
- [llvm] [NFC][AMDGPU] Autogenerating test cases (PR #124507)
via llvm-commits
- [llvm] [GISel] Explicitly disable BF16 tablegen patterns. (PR #124113)
David Green via llvm-commits
- [llvm] [SHT_LLVM_FUNC_MAP][ObjectYaml]Introduce function address map section and emit dynamic instruction count(ObjectYaml part) (PR #124332)
James Henderson via llvm-commits
- [llvm] [ORC] Add Auto-Loading DyLib Feature with Symbol Resolution (PR #109913)
Vassil Vassilev via llvm-commits
- [llvm] [llvm][Object] Add missing const qualifier for value_type in content_iterator (PR #124106)
James Henderson via llvm-commits
- [compiler-rt] [win/asan] GetInstructionSize: Support some more 6 byte instructions. (PR #124006)
via llvm-commits
- [compiler-rt] [win/asan] GetInstructionSize: Support some more 7 or 8 byte instructions. (PR #124011)
via llvm-commits
- [llvm] [llvm-objdump][ELF] Add Section size check. (#86612) (PR #124470)
James Henderson via llvm-commits
- [llvm] [RISCV] Teach expandRV32ZdinxStore to handle memoperand not being present. (PR #113981)
Gergely Futo via llvm-commits
- [clang] [llvm] [RISCV] Add MIPS extensions (PR #121394)
Djordje Todorovic via llvm-commits
- [llvm] [BOLT][AArch64] Exclude JT pattern matching under assert failure (PR #122298)
Pavel Iliin via llvm-commits
- [lld] [lld] Migrate away from PointerUnion::dyn_cast (NFC) (PR #124504)
Nikita Popov via llvm-commits
- [llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #124506)
Nikita Popov via llvm-commits
- [llvm] [memprof] Migrate away from PointerUnion::dyn_cast (NFC) (PR #124505)
Nikita Popov via llvm-commits
- [llvm] [AArch64] Avoid generating LDAPUR on certain cores (PR #124274)
Sjoerd Meijer via llvm-commits
- [llvm] bd38c49 - [AArch64] Generate zeroing forms of certain SVE2.2 instructions (8/11) (#116834)
via llvm-commits
- [llvm] [AArch64] Generate zeroing forms of certain SVE2.2 instructions (8/11) (PR #116834)
Momchil Velikov via llvm-commits
- [flang] [llvm] [mlir] [Flang] Add lowering support for depobj in depend clause (PR #124523)
Thirumalai Shaktivel via llvm-commits
- [llvm] Reland [InstCombine] Teach foldSelectOpOp about samesign (PR #124320)
Ramkumar Ramachandra via llvm-commits
- [llvm] [CMake] Use shm_open, not clock_gettime, to detect librt (PR #120727)
Raphael Kubo da Costa via llvm-commits
- [llvm] [CMake] Use shm_open, not clock_gettime, to detect librt (PR #120727)
Florian Weimer via llvm-commits
- [llvm] [CMake] Use shm_open, not clock_gettime, to detect librt (PR #120727)
Petr Hosek via llvm-commits
- [llvm] [CMake] Use shm_open, not clock_gettime, to detect librt (PR #120727)
Raphael Kubo da Costa via llvm-commits
- [llvm] [CMake] Use shm_open, not clock_gettime, to detect librt (PR #120727)
Petr Hosek via llvm-commits
- [llvm] [CMake] Use shm_open, not clock_gettime, to detect librt (PR #120727)
via llvm-commits
- [llvm] [CMake] Use shm_open, not clock_gettime, to detect librt (PR #120727)
LLVM Continuous Integration via llvm-commits
- [llvm] [AMDGPU] Eliminate likely-spurious execz checks via intrinsic argument (PR #123749)
Fabian Ritter via llvm-commits
- [compiler-rt] 351ee30 - [win/asan] GetInstructionSize: Support some more 6 byte instructions. (#124006)
via llvm-commits
- [compiler-rt] bbf3770 - [win/asan] GetInstructionSize: Support some more 7 or 8 byte instructions. (#124011)
via llvm-commits
- [llvm] [CI] Support multiple jobs in metrics container (PR #124457)
Nathan Gauër via llvm-commits
- [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)
Akshat Oke via llvm-commits
- [llvm] [workflows] Rework pre-commit CI for the release branch (PR #92058)
Tobias Hieta via llvm-commits
- [llvm] [AArch64] Generate zeroing forms of certain SVE2.2 instructions (7/11) (PR #116833)
Jonathan Thackray via llvm-commits
- [llvm] 3b5e9ee - [NVPTX] Add float to tf32 conversion intrinsics (#124316)
via llvm-commits
- [llvm] [NVPTX] Add float to tf32 conversion intrinsics (PR #124316)
Durgadoss R via llvm-commits
- [clang] [llvm] [RISCV] Renaming muladdi to muliadd as per v0.5 spec. (PR #124237)
via llvm-commits
- [llvm] [LoopVectorizer] Allow partial reductions to be made in predicated loops (PR #124268)
Sam Tebbs via llvm-commits
- [llvm] [GISel][AMDGPU] Fold ShuffleVec into ExtractSubvec, and custom lower ExtractSubvec (PR #124527)
Alan Li via llvm-commits
- [llvm] [InstCombine] Eliminate fptrunc/fpext if fast math flags allow it (PR #115027)
John Brawn via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Kristof Beyls via llvm-commits
- [llvm] [SelectionDAG] WidenVecOp_INSERT_SUBVECTOR - Replace `INSERT_SUBVECTOR` with series of `INSERT_VECTOR_ELT` (PR #124420)
Simon Pilgrim via llvm-commits
- [llvm] [AArch64][CostModel] Alter sdiv/srem cost where the divisor is constant (PR #123552)
Sushant Gokhale via llvm-commits
- [llvm] Reland "[LoopVectorize] Add support for reverse loops in isDereferenceableAndAlignedInLoop #96752" (PR #123616)
David Sherwood via llvm-commits
- [llvm] [BOLT][AArch64] Remove assertions from jump table heuristic (PR #124372)
Alexey Moksyakov via llvm-commits
- [llvm] LAA: scale strides using type-size (PR #124529)
Ramkumar Ramachandra via llvm-commits
- [llvm] [RISCV][VLOPT] Compute demanded VLs up front. NFC (PR #124530)
Luke Lau via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
Dhruv Srivastava via llvm-commits
- [llvm] [ValueTracking] Suport GEPs in matchSimpleRecurrence. (PR #123518)
Florian Hahn via llvm-commits
- [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)
David Spickett via llvm-commits
- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Enable -Wmissing-prototypes (PR #116261)
Nikolas Klauser via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] true16 codegen pat for fptrunc_round (PR #124044)
Ivan Kosarev via llvm-commits
- [llvm] [Github][CI] Add Windows Premerge Job for Testing (PR #122661)
David Spickett via llvm-commits
- [llvm] [SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (reapply) (PR #123733)
Nikita Popov via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] sched cpu affinity for linux interception. (PR #124194)
Chris Apple via llvm-commits
- [llvm] b7286db - Reland "[LoopVectorize] Add support for reverse loops in isDereferenceableAndAlignedInLoop #96752" (#123616)
via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] mremap for Linux interception. (PR #124234)
Chris Apple via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] socketpair interception. (PR #124107)
Chris Apple via llvm-commits
- [llvm] [AArch64][PAC] Select auth+load into LDRAA/LDRAB/LDRA[pre]. (PR #123769)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64] Allow register offset addressing mode for prefetch (PR #124534)
Csanád Hajdú via llvm-commits
- [llvm] [LoopIdiom] Move up atomic checks for memcpy/memmove (NFC) (PR #124535)
Ryotaro Kasuga via llvm-commits
- [llvm] [AMDGPU][True16][MC] true16 for v_cmpx_xx_u/i16 (PR #123424)
Ivan Kosarev via llvm-commits
- [compiler-rt] cfdd7d7 - [compiler-rt][rtsan] sched cpu affinity for linux interception. (#124194)
via llvm-commits
- [llvm] [AMDGPU][True16][MC] true16 for minimummaximum/max/min/max3/min3 (PR #124184)
Ivan Kosarev via llvm-commits
- [compiler-rt] e21b804 - [compiler-rt][rtsan] socketpair interception. (#124107)
via llvm-commits
- [llvm] d8ad1ee - [AArch64] Generate zeroing forms of certain SVE2.2 instructions (7/11) (#116833)
via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] true16 codegen pats for v_mad_u16 (PR #124000)
Ivan Kosarev via llvm-commits
- [clang] [llvm] [Clang] [OpenMP] Add support for '#pragma omp stripe'. (PR #119891)
Zahira Ammarguellat via llvm-commits
- [llvm] [RISC-V] Fix incorrect epilogue_begin (PR #120623)
Venkata Ramanaiah Nalamothu via llvm-commits
- [llvm] [readobj][AArch64] Parse AArch64 build attributes (PR #124276)
via llvm-commits
- [llvm] LAA: handle 0 return from getPtrStride correctly (PR #124539)
Ramkumar Ramachandra via llvm-commits
- [llvm] ef54e0b - [AArch64] Avoid generating LDAPUR on certain cores (#124274)
via llvm-commits
- [llvm] [VPlan] Don't collect live-ins in collectUsersInExitBlocks. (NFC) (PR #123819)
David Sherwood via llvm-commits
- [llvm] [LV] Add initial support for vectorizing literal struct return values (PR #109833)
Simon Pilgrim via llvm-commits
- [llvm] [CostModel][X86] getShuffleCost - shuffles with only one defined element are always cheap (PR #124412)
Simon Pilgrim via llvm-commits
- [clang] [llvm] [LLVM][Clang][AArch64] Implement AArch64 build attributes (PR #118771)
via llvm-commits
- [llvm] [AMDGPU][NFC] Sort AMDGPUPassRegistry entries alphabetically (PR #124544)
Akshat Oke via llvm-commits
- [polly] polly: Fix typos discovered by codespell (PR #124545)
Christian Clauss via llvm-commits
- [clang] [compiler-rt] [Clang] Make `-Wreturn-type` default to an error in all language modes (PR #123470)
via llvm-commits
- [llvm] [AMDGPU] selecting v_sat_pk instruction, version 2 (PR #123297)
via llvm-commits
- [llvm] 86705eb - [X86] huge-stack-offset.ll - add gnux32 test coverage
Simon Pilgrim via llvm-commits
- [llvm] [AMDGPU] Insert casts in PromoteAlloca. (PR #124547)
via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] 3a4376b - LAA: handle 0 return from getPtrStride correctly (#124539)
via llvm-commits
- [llvm] [RISCV][TTI]Use processShuffleMasks for cost estimations/actual per-register shuffles (PR #118103)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improved reduction cost/codegen (PR #118293)
Alexey Bataev via llvm-commits
- [llvm] [LV]Split store-load forward distance analysis from other checks (PR #121156)
Alexey Bataev via llvm-commits
- [llvm] [NFC][DebugInfo] Switch more call-sites to using iterator-insertion (PR #124283)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [RISCV][VLOPT] Remove unnecessary passthru restriction (PR #124549)
Luke Lau via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alex Bradbury via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alex Bradbury via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
David Green via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Martin Storsjö via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Reduce number of alternate instruction, where possible (PR #123360)
Martin Storsjö via llvm-commits
- [llvm] [RISCV][VLOPT] Allow users that are passthrus if tail elements aren't demanded (PR #124066)
Luke Lau via llvm-commits
- [clang] [llvm] default clause replaced by otherwise clause in metadirective in OpenMP 5.2 (PR #124550)
Urvi Rav via llvm-commits
- [llvm] f1d5e70 - [SLP][NFC]Do not check poison values for corresponding vectorized entries
Alexey Bataev via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #121222)
Michael Maitland via llvm-commits
- [lldb] [llvm] [NFC][DebugInfo] Make some block-start-position methods return iterators (PR #124287)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [LoopVectorize][NFC] Remove unused variable in addUsersInExitBlocks (PR #124553)
David Sherwood via llvm-commits
- [llvm] [Build Attributes] Standardize names according to convention. (PR #124556)
via llvm-commits
- [clang] [llvm] [NFC][DebugInfo] Rewrite more call-sites to insert with iterators (PR #124288)
Orlando Cazalet-Hyams via llvm-commits
- [polly] polly: Fix files that contain Python 3 SyntaxErrors (PR #124424)
Michael Kruse via llvm-commits
- [llvm] [mlir] [NFC][DebugInfo] Mop up final instruction-insertion call sites (PR #124289)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [LoopVectorize] Use CodeSize as the cost kind for minsize (PR #124119)
David Sherwood via llvm-commits
- [clang] [llvm] [NFC][DebugInfo] Use iterators for instruction insertion in more places (PR #124291)
Orlando Cazalet-Hyams via llvm-commits
- [compiler-rt] [tsan] Add support for linux/riscv64 in lib/tsan/go/buildgo.sh (PR #124557)
Meng Zhuo via llvm-commits
- [llvm] [AMDGPU][True16][MC] true16 for v_cmpx_xx_f16 (PR #123419)
Brox Chen via llvm-commits
- [llvm] 62340ff - [AMDGPU][True16][MC] true16 for v_cmpx_xx_f16 (#123419)
via llvm-commits
- [compiler-rt] [sanitizer] Support "alloc_dealloc_mismatch" suppressions (PR #124197)
via llvm-commits
- [polly] 5aafc6d - [Polly] Fix typos discovered by codespell (#124545)
via llvm-commits
- [llvm] [SPIR-V] Type inference must realize that a <1 x Type> vector type is not a legal vector type in LLT (PR #124560)
Vyacheslav Levytskyy via llvm-commits
- [llvm] e14962a - [NFC][DebugInfo] Use iterators for instruction insertion in more places (#124291)
via llvm-commits
- [clang] [llvm] [AArch64] Add Neon FP8 conversion intrinsics (PR #123612)
Momchil Velikov via llvm-commits
- [llvm] 212f344 - [InstCombine] Handle constant expression result in tryFactorization()
Nikita Popov via llvm-commits
- [llvm] [NFC][DebugInfo] Deprecate iterator-taking moveBefore and getFirstNonPHI (PR #124290)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] 5592875 - [GlobalMerge][NFC] Reland "Skip sorting by profitability when it is not needed"
Michael Maitland via llvm-commits
- [llvm] [VPlan] Move auxiliary declarations out of VPlan.h (NFC). (PR #124104)
David Sherwood via llvm-commits
- [llvm] LAA: refine condition for invariant stores (PR #124567)
Ramkumar Ramachandra via llvm-commits
- [llvm] [Clang] Prevent `mlink-builtin-bitcode` from internalizing the RPC client (PR #118661)
Shilei Tian via llvm-commits
- [clang] [flang] [llvm] [Clang] Remove ARCMigrate (PR #119269)
via llvm-commits
- [llvm] [X86][GlobalISel] Support G_FCMP for scalar cases (PR #123598)
via llvm-commits
- [clang] [llvm] [mlir] [Offload] Rework offloading entry type to be more generic (PR #124018)
Jan Patrick Lehr via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
Jon Chesterfield via llvm-commits
- [llvm] [LLVM][CMake][MSVC] Wrap linker options for ICX with LLVM_BUILD_INSTUMENTED (PR #124573)
Mészáros Gergely via llvm-commits
- [llvm] f95f10c - [AArch64] Generate zeroing forms of certain SVE2.2 instructions (9/11) (#116835)
via llvm-commits
- [llvm] [AArch64] Generate zeroing forms of certain SVE2.2 instructions (9/11) (PR #116835)
Momchil Velikov via llvm-commits
- [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)
Sam Tebbs via llvm-commits
- [llvm] cb6f021 - [RISCV][VLOPT] Remove unnecessary passthru restriction (#124549)
via llvm-commits
- [llvm] 178f471 - [CostModel][X86] getShuffleCost - shuffles with only one defined element are always cheap (#124412)
via llvm-commits
- [llvm] Reapply "[AArch64] Combine and and lsl into ubfiz" (#123356) (PR #124576)
Cullen Rhodes via llvm-commits
- [llvm] 16e9601 - [Flang] Adjust the trampoline size for AArch64 and PPC (#118678)
via llvm-commits
- [flang] [llvm] [Flang] Adjust the trampoline size for AArch64 and PPC (PR #118678)
via llvm-commits
- [llvm] [InstCombine] Simple store-to-load forwaring between fixed/scalable vectors (PR #124577)
via llvm-commits
- [llvm] [NVPTX][InferAS] assume alloca instructions are in local AS (PR #121710)
Justin Fargnoli via llvm-commits
- [llvm] ad2b2aa - [PhaseOrdering] vector-trunc.ll - use -passes="default<O2>" to allow DOS to correctly evaluate the RUN command
Simon Pilgrim via llvm-commits
- [llvm] 1bb784a - [LowerMatrixIntrinsics] multiply-minimal.ll - use -passes="..." to allow DOS to correctly evaluate the RUN command
Simon Pilgrim via llvm-commits
- [clang] [llvm] [mlir] [openmp] [Offload] Rework offloading entry type to be more generic (PR #124018)
Joseph Huber via llvm-commits
- [llvm] 749443a - [NFC][DebugInfo] Mop up final instruction-insertion call sites (#124289)
via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Jay Foad via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Jay Foad via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Jay Foad via llvm-commits
- [llvm] [AMDGCN][SIWholeQuadMode] Handle case when SI_KILL_I1_TERMINATOR -1,0 is not the only terminator (PR #122922)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] 09a29fc - [VPlan] Don't collect live-ins in collectUsersInExitBlocks. (NFC) (#123819)
via llvm-commits
- [llvm] [IA][RISCV] Support VP loads/stores in InterleavedAccessPass (PR #120490)
Luke Lau via llvm-commits
- [polly] [polly] python futurize --stage1 --write (PR #124580)
Christian Clauss via llvm-commits
- [llvm] [ELFObject.cpp] Added dbgs() statement in removeSections() Function (PR #124582)
Kshitij Paranjape via llvm-commits
- [llvm] 81d18ad - [NFC][DebugInfo] Make some block-start-position methods return iterators (#124287)
via llvm-commits
- [llvm] LAA/test: cover invariant stores with unit stride (PR #124586)
Ramkumar Ramachandra via llvm-commits
- [llvm] [LoopVectorize] Enable vectorisation of early exit loops with live-outs (PR #120567)
Florian Hahn via llvm-commits
- [lld] Make hashtable entry size configurable (PR #113431)
Ulrich Weigand via llvm-commits
- [lld] [llvm] Add `NO_VERSIONING` feature in `add_llvm_library` (PR #124588)
Parth Arora via llvm-commits
- [llvm] 34b1395 - [NFC][DebugInfo] Switch more call-sites to using iterator-insertion (#124283)
via llvm-commits
- [llvm] 4e23101 - [AArch64] Generate zeroing forms of certain SVE2.2 instructions (10/11) (#116836)
via llvm-commits
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Alexey Bataev via llvm-commits
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Yingwei Zheng via llvm-commits
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Simon Pilgrim via llvm-commits
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Matt Arsenault via llvm-commits
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Craig Topper via llvm-commits
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Rahul Joshi via llvm-commits
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Jeffrey Byrnes via llvm-commits
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Kazu Hirata via llvm-commits
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Alexey Bataev via llvm-commits
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Thurston Dang via llvm-commits
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Alexander Richardson via llvm-commits
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Daniel Hoekwater via llvm-commits
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David Majnemer via llvm-commits
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Kai Nacke via llvm-commits
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Philip Reames via llvm-commits
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Daniel Hoekwater via llvm-commits
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Alexey Bataev via llvm-commits
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Keith Smiley via llvm-commits
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Kazu Hirata via llvm-commits
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Daniel Hoekwater via llvm-commits
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Marek Sedláček via llvm-commits
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Janis Heims via llvm-commits
- [llvm] 41745a2 - [NFC][DirectX] Change deprecated insertBefore(Instruction*) API (#125308)
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Rahul Joshi via llvm-commits
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- [llvm] ae7f7c4 - [RISCV] Add PseudoCCMOVGPRNoX0 to RISCVOptWInstrs.
Craig Topper via llvm-commits
- [llvm] db7e2e5 - [RISCV] Add PseudoCCMOVGPRNoX0 test caes for RISCVOptWInstrs. NFC
Craig Topper via llvm-commits
- [llvm] LAA: clarify loop-variant GEP idx computation (PR #125315)
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- [llvm] a3799f2 - [RISCV] Remove potentially incompatible vtype toggles fro mvlseg-vsseg mca test (#125226)
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- [llvm] [Bazel] Add support for Bzlmod (PR #88927)
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Daniel Paoliello via llvm-commits
- [llvm] 1eac7cd - [M68k] always use movem for register spills (#106715)
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Tom Stellard via llvm-commits
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Yingwei Zheng via llvm-commits
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Alexey Bataev via llvm-commits
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Akshat Oke via llvm-commits
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Sergei Barannikov via llvm-commits
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Fangrui Song via llvm-commits
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Tristan Ross via llvm-commits
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Tom Stellard via llvm-commits
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Kazu Hirata via llvm-commits
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Yingwei Zheng via llvm-commits
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David Green via llvm-commits
- [llvm] [M68k] add 32 bit branch instrs and relaxations (PR #117371)
Kane York via llvm-commits
- [llvm] 2eabcb7 - [TableGen] Use range-based for loop. NFC
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Michał Górny via llvm-commits
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Michał Górny via llvm-commits
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Michał Górny via llvm-commits
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Mariusz Sikora via llvm-commits
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- [llvm] a5e969a - [CodeGen] Avoid repeated hash lookups (NFC) (#125382)
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Alex Bradbury via llvm-commits
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Henry Jiang via llvm-commits
- [llvm] 8aebceb - [LVI] Add trunc to i1 handling. (#124480)
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- [llvm] [SelectionDAG][X86] Split via Concat <n x T> vector types for atomic … (PR #120640)
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- [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)
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- [llvm] [SelectionDAG][X86] Split via Concat <n x T> vector types for atomic load (PR #120640)
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- [llvm] [AArch64][GlobalISel] Add disjoint handling for add_and_or_is_add. (PR #123594)
David Green via llvm-commits
- [llvm] 070e129 - [AArch64][GlobalISel] Add disjoint handling for add_and_or_is_add. (#123594)
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- [llvm] [Bazel] Migrate to Bzlmod (PR #88927)
Aaron Siddhartha Mondal via llvm-commits
- [llvm] [VPlan] Compute cost for binary op VPInstruction with underlying values. (PR #125434)
Florian Hahn via llvm-commits
- [llvm] [GlobalISel] Add and use a m_GAddLike pattern matcher. NFC (PR #125435)
David Green via llvm-commits
- [llvm] [VPlan] Only use SCEV for live-ins in tryToWiden. (PR #125436)
Florian Hahn via llvm-commits
- [llvm] [LV] Don't simplify wide binops to constants if non-uniform (PR #121898)
Florian Hahn via llvm-commits
- [llvm] [NFC][Lanai][Hexagon] Define DEBUG_TYPE after including Debug.h. (PR #125440)
Jason Eckhardt via llvm-commits
- [lld] 115bb87 - [lld] BPSectionOrderer: replace Symbol with Defined and optimize getSymbols. NFC
Fangrui Song via llvm-commits
- [lld] [ELF] Add BPSectionOrderer options (PR #120514)
Fangrui Song via llvm-commits
- [llvm] f6578c3 - [Xtensa] Implement Windowed Register Option. (#124656)
via llvm-commits
- [lld] 0154dce - [ELF] Add BPSectionOrderer options (#120514)
via llvm-commits
- [llvm] 2c030a1 - [gn build] Port 0154dce8d39d
LLVM GN Syncbot via llvm-commits
- [llvm] edc8c35 - [ConstraintElimination] Fix comment (#125375)
via llvm-commits
- [llvm] f17b9dd - [LVI] Handle nonnull attributes at callsite (#125377)
via llvm-commits
- [lld] [test] fix test for BPOrder (PR #125447)
Pengying Xu via llvm-commits
- [llvm] [RISCV][TTI] Implement instruction cost for vp.splice. (PR #124221)
Elvis Wang via llvm-commits
- [lld] [test] Fixes #120514 (PR #125450)
Pengying Xu via llvm-commits
- [llvm] 31db7af - [TableGen] Split DAGISelMatcherOpt FactorNodes into 2 functions. NFC (#125330)
via llvm-commits
- [llvm] Correct documentation for `roundeven` (PR #125452)
Trevor Gross via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] ptrace interception on Linux. (PR #123941)
Chris Apple via llvm-commits
- [llvm] [InstCombine] Handle isnormal idiom (PR #125454)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Check isFixedLengthVector before calling getVectorNumElements in getSingleShuffleSrc. (PR #125455)
Craig Topper via llvm-commits
- [lld] c92f204 - [lld] BPSectionOrderer: stabilize iteration order with MapVector
Fangrui Song via llvm-commits
- [lld] [lld] Migrate away from PointerUnion::dyn_cast (NFC) (PR #125458)
Kazu Hirata via llvm-commits
- [llvm] [Hexagon] Avoid repeated hash lookups (NFC) (PR #125459)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Remove undef in `llvm/test/Transforms` tests (PR #125460)
via llvm-commits
- [lld] 046dd4b - [lld] BPSectionOrderer: stabilize iteration order
Fangrui Song via llvm-commits
- [llvm] 711fcae - [ValueTracking] Handle `trunc nuw` in `computeKnownBitsFromICmpCond` (#125414)
via llvm-commits
- [llvm] 567d28d - [ReachingDefAnalysis] Fix LLVM_ENABLE_REVERSE_ITERATION bot after #118097
Fangrui Song via llvm-commits
- [llvm] fe9a97c - [CodeGen][NewPM] Port RegisterCoalescer to NPM (#124698)
via llvm-commits
- [llvm] [CodeGen][NewPM] Port RenameIndependentSubregs to NPM (PR #125192)
Matt Arsenault via llvm-commits
- [clang] [compiler-rt] [profile] Add `%b` `LLVM_PROFILE_FILE` option for binary ID (PR #123963)
Sinkevich Artem via llvm-commits
- [lldb] [llvm] [lldb] Extended if conditions to support alias names for registers (PR #124475)
via llvm-commits
- [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #125462)
Kazu Hirata via llvm-commits
- [llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #125463)
Kazu Hirata via llvm-commits
- [llvm] [ProfileData] Avoid repeated hash lookups (NFC) (PR #125464)
Kazu Hirata via llvm-commits
- [llvm] b693e1c - [X86][GlobalISel] Enable G_LROUND/G_LLROUND with libcall mapping (#125096)
via llvm-commits
- [llvm] [MachinePipeliner] Add an abstract layer to manipulate Data Dependenc… (PR #109918)
Michael Marjieh via llvm-commits
- [llvm] 7fb233f - [ORC] Fix file comment formatting. NFC.
Lang Hames via llvm-commits
- [llvm] a1ff2d1 - [ORC] Drop 'Info' from MachOCompactUnwindInfoSectionName.
Lang Hames via llvm-commits
- [llvm] fc89745 - [RISCV][NFC] Clarify getRISCVInstructionCost usage (#121556)
via llvm-commits
Last message date:
Sun Feb 2 23:55:30 PST 2025
Archived on: Sun Feb 2 23:55:33 PST 2025
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