[llvm] clastb representation in existing IR, and AArch64 codegen (PR #112738)

[Benjamin Maxwell via llvm-commits]

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@@ -3379,6 +3379,20 @@ let Predicates = [HasSVE_or_SME] in {
   def : Pat<(i64 (vector_extract nxv2i64:$vec, VectorIndexD:$index)),
             (UMOVvi64 (v2i64 (EXTRACT_SUBREG ZPR:$vec, zsub)), VectorIndexD:$index)>;
 
+  // Find index of last active lane. This is a fallback in case we miss the
+  // opportunity to fold into a lastb or clastb directly.
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MacDue wrote:

Are these fallback patterns tested in the final patch?

https://github.com/llvm/llvm-project/pull/112738