[llvm] [RISCV] Select mask operands as virtual registers and eliminate vmv0 (PR #125026)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 30 09:21:02 PST 2025


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@@ -124,12 +125,12 @@ define float @extract_last_float(<4 x float> %data, <4 x i32> %mask, float %pass
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
 ; CHECK-NEXT:    vmsne.vi v0, v9, 0
-; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
-; CHECK-NEXT:    vmv.v.i v9, 0
 ; CHECK-NEXT:    vcpop.m a0, v0
-; CHECK-NEXT:    vid.v v9, v0.t
 ; CHECK-NEXT:    beqz a0, .LBB4_2
 ; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
+; CHECK-NEXT:    vmv.v.i v9, 0
+; CHECK-NEXT:    vid.v v9, v0.t
----------------
preames wrote:

Complete aside: We could use a start value of -1 here, use a vredmaxs instead, and move the conditional branch to be after the reduction, and guard only the slidedown and extract.  Doing so would remove a vcpop.  This assumes that the passthru case is exceedingly rare.  

Actually, we could replace the slidedown entirely with another masked reduction (mask being a comparison of the vid to the result of the max), and feed the passthru through as the start value for an entirely branchless sequence.  Not sure the required vrgather.vi is worth it there though.  

https://github.com/llvm/llvm-project/pull/125026


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