[llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)

Piotr Sobczak via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 29 08:20:31 PST 2025


piotrAMD wrote:

> > When set, it will disallow buffer accesses with alignment lower than natural alignment.
> 
> To be more precise, it will prevent passes like SILoadStoreOptimizer from introducing _new_ loads/stores (by combining existing loads/stores) that are not naturally aligned, right? Is this based on known alignment of the access, or just by checking the alignment of the _offset_ from the start of the buffer?

Right, this is about the target load being naturally aligned. This is based on known alignment of the access. See also test llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/unaligned-buffer.ll.

> 
> I think this will fix the bounds checking problem that you explain, but only if we can guarantee that the start of the buffer is at least as aligned as the largest buffer load/store we can generate, which is 16 bytes for a dwordx4 access.

My understanding is that Vulkan API enforces that for buffer ("A structure has a base alignment equal to the largest base alignment of any of its members", and there are more rules).

If we agree this is the right approach, I will invert the target feature so the stricter alignment is the base requirement, as Matt suggested (this can cause some test churn).


https://github.com/llvm/llvm-project/pull/115479


More information about the llvm-commits mailing list