[llvm] clastb representation in existing IR, and AArch64 codegen (PR #112738)
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 31 10:23:18 PST 2025
================
@@ -3379,6 +3379,20 @@ let Predicates = [HasSVE_or_SME] in {
def : Pat<(i64 (vector_extract nxv2i64:$vec, VectorIndexD:$index)),
(UMOVvi64 (v2i64 (EXTRACT_SUBREG ZPR:$vec, zsub)), VectorIndexD:$index)>;
+ // Find index of last active lane. This is a fallback in case we miss the
+ // opportunity to fold into a lastb or clastb directly.
----------------
sdesmalen-arm wrote:
I agree it would be good to have some tests for these.
https://github.com/llvm/llvm-project/pull/112738
More information about the llvm-commits
mailing list