[llvm] [AMDGPU] Filter candidates of LiveRegOptimizer for profitable cases (PR #124624)
Jeffrey Byrnes via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 29 11:53:07 PST 2025
================
@@ -202,23 +287,113 @@ define amdgpu_kernel void @v32i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1
; GFX906: ; %bb.0: ; %entry
; GFX906-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX906-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX906-NEXT: v_lshlrev_b32_e32 v10, 5, v0
+; GFX906-NEXT: v_lshlrev_b32_e32 v31, 5, v0
; GFX906-NEXT: v_mov_b32_e32 v9, 0
; GFX906-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0
; GFX906-NEXT: s_waitcnt lgkmcnt(0)
-; GFX906-NEXT: global_load_dwordx4 v[1:4], v10, s[0:1] offset:16
-; GFX906-NEXT: global_load_dwordx4 v[5:8], v10, s[0:1]
+; GFX906-NEXT: global_load_dwordx4 v[1:4], v31, s[0:1] offset:16
+; GFX906-NEXT: global_load_dwordx4 v[5:8], v31, s[0:1]
+; GFX906-NEXT: s_waitcnt vmcnt(1)
+; GFX906-NEXT: v_lshrrev_b32_e32 v0, 24, v4
+; GFX906-NEXT: v_lshrrev_b32_e32 v10, 16, v4
+; GFX906-NEXT: v_lshrrev_b32_e32 v11, 8, v4
+; GFX906-NEXT: v_lshrrev_b32_e32 v12, 24, v3
+; GFX906-NEXT: v_lshrrev_b32_e32 v13, 16, v3
+; GFX906-NEXT: v_lshrrev_b32_e32 v14, 8, v3
+; GFX906-NEXT: v_lshrrev_b32_e32 v15, 24, v2
+; GFX906-NEXT: v_lshrrev_b32_e32 v16, 16, v2
+; GFX906-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; GFX906-NEXT: v_lshrrev_b32_e32 v18, 24, v1
+; GFX906-NEXT: v_lshrrev_b32_e32 v19, 16, v1
+; GFX906-NEXT: v_lshrrev_b32_e32 v20, 8, v1
+; GFX906-NEXT: s_waitcnt vmcnt(0)
+; GFX906-NEXT: v_lshrrev_b32_e32 v21, 24, v8
+; GFX906-NEXT: v_lshrrev_b32_e32 v22, 16, v8
+; GFX906-NEXT: v_lshrrev_b32_e32 v23, 8, v8
+; GFX906-NEXT: v_lshrrev_b32_e32 v24, 24, v7
+; GFX906-NEXT: v_lshrrev_b32_e32 v25, 16, v7
+; GFX906-NEXT: v_lshrrev_b32_e32 v26, 8, v7
+; GFX906-NEXT: v_lshrrev_b32_e32 v27, 24, v6
+; GFX906-NEXT: v_lshrrev_b32_e32 v28, 16, v6
+; GFX906-NEXT: v_lshrrev_b32_e32 v29, 8, v6
+; GFX906-NEXT: v_lshrrev_b32_e32 v30, 24, v5
+; GFX906-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; GFX906-NEXT: v_lshrrev_b32_e32 v33, 8, v5
; GFX906-NEXT: s_and_saveexec_b64 s[0:1], vcc
; GFX906-NEXT: s_cbranch_execz .LBB5_2
; GFX906-NEXT: ; %bb.1: ; %bb.1
-; GFX906-NEXT: global_load_dwordx4 v[1:4], v10, s[2:3] offset:16
-; GFX906-NEXT: global_load_dwordx4 v[5:8], v10, s[2:3]
+; GFX906-NEXT: global_load_dwordx4 v[1:4], v31, s[2:3] offset:16
+; GFX906-NEXT: global_load_dwordx4 v[5:8], v31, s[2:3]
+; GFX906-NEXT: s_waitcnt vmcnt(1)
+; GFX906-NEXT: v_lshrrev_b32_e32 v0, 24, v4
+; GFX906-NEXT: v_lshrrev_b32_e32 v10, 16, v4
+; GFX906-NEXT: v_lshrrev_b32_e32 v11, 8, v4
+; GFX906-NEXT: v_lshrrev_b32_e32 v12, 24, v3
+; GFX906-NEXT: v_lshrrev_b32_e32 v13, 16, v3
+; GFX906-NEXT: v_lshrrev_b32_e32 v14, 8, v3
+; GFX906-NEXT: v_lshrrev_b32_e32 v15, 24, v2
+; GFX906-NEXT: v_lshrrev_b32_e32 v16, 16, v2
+; GFX906-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; GFX906-NEXT: v_lshrrev_b32_e32 v18, 24, v1
+; GFX906-NEXT: v_lshrrev_b32_e32 v19, 16, v1
+; GFX906-NEXT: v_lshrrev_b32_e32 v20, 8, v1
+; GFX906-NEXT: s_waitcnt vmcnt(0)
+; GFX906-NEXT: v_lshrrev_b32_e32 v21, 24, v8
+; GFX906-NEXT: v_lshrrev_b32_e32 v22, 16, v8
+; GFX906-NEXT: v_lshrrev_b32_e32 v23, 8, v8
+; GFX906-NEXT: v_lshrrev_b32_e32 v24, 24, v7
+; GFX906-NEXT: v_lshrrev_b32_e32 v25, 16, v7
+; GFX906-NEXT: v_lshrrev_b32_e32 v26, 8, v7
+; GFX906-NEXT: v_lshrrev_b32_e32 v27, 24, v6
+; GFX906-NEXT: v_lshrrev_b32_e32 v28, 16, v6
+; GFX906-NEXT: v_lshrrev_b32_e32 v29, 8, v6
+; GFX906-NEXT: v_lshrrev_b32_e32 v30, 24, v5
+; GFX906-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; GFX906-NEXT: v_lshrrev_b32_e32 v33, 8, v5
; GFX906-NEXT: .LBB5_2: ; %bb.2
; GFX906-NEXT: s_or_b64 exec, exec, s[0:1]
-; GFX906-NEXT: s_waitcnt vmcnt(1)
-; GFX906-NEXT: global_store_dwordx4 v9, v[1:4], s[6:7] offset:16
-; GFX906-NEXT: s_waitcnt vmcnt(1)
+; GFX906-NEXT: v_lshlrev_b16_e32 v30, 8, v30
+; GFX906-NEXT: v_lshlrev_b16_e32 v31, 8, v33
+; GFX906-NEXT: v_lshlrev_b16_e32 v29, 8, v29
+; GFX906-NEXT: v_lshlrev_b16_e32 v27, 8, v27
+; GFX906-NEXT: v_lshlrev_b16_e32 v26, 8, v26
+; GFX906-NEXT: v_lshlrev_b16_e32 v24, 8, v24
+; GFX906-NEXT: v_lshlrev_b16_e32 v23, 8, v23
+; GFX906-NEXT: v_lshlrev_b16_e32 v21, 8, v21
+; GFX906-NEXT: v_or_b32_sdwa v30, v32, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v5, v5, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v27, v28, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v7, v7, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v8, v8, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v6, v6, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v7, v7, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v8, v8, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; GFX906-NEXT: global_store_dwordx4 v9, v[5:8], s[6:7]
+; GFX906-NEXT: v_lshlrev_b16_e32 v0, 8, v0
+; GFX906-NEXT: v_lshlrev_b16_e32 v5, 8, v20
+; GFX906-NEXT: v_or_b32_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_lshlrev_b16_e32 v5, 8, v18
+; GFX906-NEXT: v_or_b32_sdwa v5, v19, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT: v_lshlrev_b16_e32 v5, 8, v17
+; GFX906-NEXT: v_or_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_lshlrev_b16_e32 v5, 8, v15
+; GFX906-NEXT: v_or_b32_sdwa v5, v16, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT: v_lshlrev_b16_e32 v5, 8, v14
+; GFX906-NEXT: v_or_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_lshlrev_b16_e32 v5, 8, v12
+; GFX906-NEXT: v_or_b32_sdwa v5, v13, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT: v_lshlrev_b16_e32 v5, 8, v11
+; GFX906-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v0, v10, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT: v_or_b32_sdwa v4, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT: global_store_dwordx4 v9, v[1:4], s[6:7] offset:16
----------------
jrbyrnes wrote:
Ditto
https://github.com/llvm/llvm-project/pull/124624
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