[llvm] [RISCV] Select mask operands as virtual registers and eliminate vmv0 (PR #125026)

[Philip Reames via llvm-commits]

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@@ -1495,47 +1495,73 @@ declare <vscale x 16 x double> @llvm.vp.nearbyint.nxv16f64(<vscale x 16 x double
 define <vscale x 16 x double> @vp_nearbyint_nxv16f64(<vscale x 16 x double> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {
 ; CHECK-LABEL: vp_nearbyint_nxv16f64:
 ; CHECK:       # %bb.0:
+; CHECK-NEXT:    addi sp, sp, -16
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preames wrote:

There's a couple cases like this in the test diffs where we need a frame setup after the change and not before.  I'm pretty sure this is an artifact of scheduling - and thus not blocking for this change - but this is interesting, and possibly worth a bit of digging into as a followup.  

https://github.com/llvm/llvm-project/pull/125026