[llvm] [IA][RISCV] Support VP loads/stores in InterleavedAccessPass (PR #120490)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 29 15:48:40 PST 2025


================
@@ -22529,6 +22530,282 @@ bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore(
   return true;
 }
 
+static bool isMultipleOfN(const Value *V, const DataLayout &DL, unsigned N) {
+  assert(N);
+  if (N == 1)
+    return true;
+
+  if (isPowerOf2_32(N)) {
+    KnownBits KB = llvm::computeKnownBits(V, DL);
+    return KB.countMinTrailingZeros() >= Log2_32(N);
+  } else {
----------------
topperc wrote:

No else after return.

https://github.com/llvm/llvm-project/pull/120490


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