[llvm] [RISCV] Select mask operands as virtual registers and eliminate vmv0 (PR #125026)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 29 20:38:59 PST 2025
================
@@ -5,13 +5,14 @@
define i8 @extract_last_i8(<16 x i8> %data, <16 x i8> %mask, i8 %passthru) {
; CHECK-LABEL: extract_last_i8:
; CHECK: # %bb.0:
-; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, mu
+; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
; CHECK-NEXT: vmsne.vi v0, v9, 0
-; CHECK-NEXT: vmv.v.i v9, 0
; CHECK-NEXT: vcpop.m a1, v0
-; CHECK-NEXT: vid.v v9, v0.t
; CHECK-NEXT: beqz a1, .LBB0_2
; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: vmv.v.i v9, 0
+; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu
+; CHECK-NEXT: vid.v v9, v0.t
----------------
lukel97 wrote:
This is an example of code sinking
https://github.com/llvm/llvm-project/pull/125026
More information about the llvm-commits
mailing list