[llvm] [RISCV] Teach expandRV32ZdinxStore to handle memoperand not being present. (PR #113981)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 27 22:15:35 PST 2025


topperc wrote:

> Hi,
> 
> Sorry for the late answer, I created a reduced test: https://godbolt.org/z/sPs4E16x6
> 
> Regards, Gergely
> 
> This is the relevant part:
> 
> ```
> *** MachineFunction at end of ISel ***
> # Machine code for function __rem_pio2: IsSSA, TracksLiveness
> Frame Objects:
>   fi#-2: size=4, align=4, fixed, at location [SP+4]
>   fi#-1: size=4, align=16, fixed, at location [SP]
> Function Live Ins: $x17 in %7
> 
> bb.0.entry:
>   successors: %bb.3(0x40000000), %bb.2(0x40000000); %bb.3(50.00%), %bb.2(50.00%)
>   liveins: $x17
>   %7:gpr = COPY $x17
>   %10:gpr = ANDI %7:gpr, 1
>   %9:gprnox0 = LW %fixed-stack.0, 0 :: (load (s32) from %fixed-stack.0)
>   %8:gprnox0 = LW %fixed-stack.1, 0 :: (load (s32) from %fixed-stack.1, align 16)
>   BNE killed %10:gpr, $x0, %bb.3
>   PseudoBR %bb.2
> 
> bb.1.common.ret:
> ; predecessors: %bb.2, %bb.3
> 
>   %13:gpr = COPY $x0
>   $x10 = COPY %13:gpr
>   PseudoRET implicit $x10
> 
> bb.2.if.then7:
> ; predecessors: %bb.0
>   successors: %bb.1(0x80000000); %bb.1(100.00%)
> 
>   %11:gprpair = FCVT_D_W_IN32X $x0, 0
>   PseudoRV32ZdinxSD killed %11:gprpair, %8:gprnox0, 0 :: (store (s64) into %ir.arrayidx13)
>   PseudoBR %bb.1
> 
> bb.3.if.else:
> ; predecessors: %bb.0
>   successors: %bb.1(0x80000000); %bb.1(100.00%)
> 
>   %12:gprpair = FCVT_D_W_IN32X $x0, 0
>   PseudoRV32ZdinxSD killed %12:gprpair, %9:gprnox0, 0 :: (store (s64) into %ir.arrayidx20)
>   PseudoBR %bb.1
> 
> # End machine code for function __rem_pio2.
> ```
> 
> ```
> # *** IR Dump After Tail Duplication (tailduplication) ***:
> # Machine code for function __rem_pio2: NoPHIs, TracksLiveness, NoVRegs, TiedOpsRewritten, TracksDebugUserValues
> Frame Objects:
>   fi#-2: size=4, align=4, fixed, at location [SP+4]
>   fi#-1: size=4, align=16, fixed, at location [SP]
> Function Live Ins: $x17
> 
> bb.0.entry:
>   successors: %bb.3(0x40000000), %bb.1(0x40000000); %bb.3(50.00%), %bb.1(50.00%)
>   liveins: $x17
>   renamable $x10 = ANDI killed renamable $x17, 1
>   BNE killed renamable $x10, $x0, %bb.3
> 
> bb.1.if.then7:
> ; predecessors: %bb.0
>   successors: %bb.2(0x80000000); %bb.2(100.00%)
> 
>   renamable $x10 = LW $x2, 0 :: (load (s32) from %fixed-stack.1, align 16)
> 
> bb.2.common.ret:
> ; predecessors: %bb.1, %bb.3
>   liveins: $x10
>   renamable $x12_x13 = FCVT_D_W_IN32X $x0, 0
>   PseudoRV32ZdinxSD killed renamable $x12_x13, killed renamable $x10, 0 :: (store (s64) into %ir.arrayidx13), (store (s64) into %ir.arrayidx20)
>   $x10 = COPY $x0
>   PseudoRET implicit $x10
> 
> bb.3.if.else:
> ; predecessors: %bb.0
>   successors: %bb.2(0x80000000); %bb.2(100.00%)
> 
>   renamable $x10 = LW $x2, 4 :: (load (s32) from %fixed-stack.0)
>   PseudoBR %bb.2
> 
> # End machine code for function __rem_pio2.
> ```

Should be fixed after d4af658323c6e2492ca1224930488c390a08c720

https://github.com/llvm/llvm-project/pull/113981


More information about the llvm-commits mailing list