[llvm] 62bcbe6 - [llvm-mca] Use MCRegister::id() to remove an implicit conversion. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-01-30T00:19:10-08:00
New Revision: 62bcbe62dd635ceaad25d2fb2c94e9914451dc99

URL: https://github.com/llvm/llvm-project/commit/62bcbe62dd635ceaad25d2fb2c94e9914451dc99
DIFF: https://github.com/llvm/llvm-project/commit/62bcbe62dd635ceaad25d2fb2c94e9914451dc99.diff

LOG: [llvm-mca] Use MCRegister::id() to remove an implicit conversion. NFC

It might be worth plumbing MCRegister through this code, but it's
very often used as a index and would require many more calls to
id().

Added: 
    

Modified: 
    llvm/lib/MCA/InstrBuilder.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/MCA/InstrBuilder.cpp b/llvm/lib/MCA/InstrBuilder.cpp
index 9304e6c57a3859..2cb19086953085 100644
--- a/llvm/lib/MCA/InstrBuilder.cpp
+++ b/llvm/lib/MCA/InstrBuilder.cpp
@@ -735,7 +735,7 @@ InstrBuilder::createInstruction(const MCInst &MCI,
       // Skip non-register operands.
       if (!Op.isReg())
         continue;
-      RegID = Op.getReg();
+      RegID = Op.getReg().id();
     } else {
       // Implicit read.
       RegID = RD.RegisterID;
@@ -800,8 +800,8 @@ InstrBuilder::createInstruction(const MCInst &MCI,
   unsigned WriteIndex = 0;
   Idx = 0U;
   for (const WriteDescriptor &WD : D.Writes) {
-    RegID = WD.isImplicitWrite() ? MCRegister(WD.RegisterID)
-                                 : MCI.getOperand(WD.OpIndex).getReg();
+    RegID = WD.isImplicitWrite() ? WD.RegisterID
+                                 : MCI.getOperand(WD.OpIndex).getReg().id();
     // Check if this is a optional definition that references NoReg or a write
     // to a constant register.
     if ((WD.IsOptionalDef && !RegID) || MRI.isConstant(RegID)) {