[llvm] [RISCV][VLOPT] Compute demanded VLs up front. NFC (PR #124530)

Michael Maitland via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 27 07:14:34 PST 2025


================
@@ -1230,46 +1233,59 @@ RISCVVLOptimizer::getMinimumVLForUser(MachineOperand &UserOp) {
   // Looking for an immediate or a register VL that isn't X0.
   assert((!VLOp.isReg() || VLOp.getReg() != RISCV::X0) &&
          "Did not expect X0 VL");
+
+  // If we know the demanded VL of UserMI, then we can reduce the VL it
+  // requires.
+  if (DemandedVLs.contains(&UserMI)) {
+    // We can only shrink the demanded VL if the elementwise result doesn't
+    // depend on VL (i.e. not vredsum/viota etc.)
+    // Also conservatively restrict to supported instructions for now.
+    // TODO: Can we remove the isSupportedInstr check?
+    if (!RISCVII::elementsDependOnVL(
+            TII->get(RISCV::getRVVMCOpcode(UserMI.getOpcode())).TSFlags) &&
+        isSupportedInstr(UserMI)) {
----------------
michaelmaitland wrote:

isSupportedInstr is supposed to be the set of instructions that we can reduce VL for. We aren't actually reducing the VL of UserMI here though. I see why there might be significant overlap between what you are querying here and what that function checks. I think we should keep the check for now.

https://github.com/llvm/llvm-project/pull/124530


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