[llvm] [SelectionDAG] WidenVecOp_INSERT_SUBVECTOR - Replace `INSERT_SUBVECTOR` with series of `INSERT_VECTOR_ELT` (PR #124420)

[Simon Pilgrim via llvm-commits]

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@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+
+define <4 x i32> @insert_i32_v2_in_v4_at_0(<4 x i32> %a, <2 x i32> %b) {
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RKSimon wrote:

(style) insert_v2i32_in_v4i32_at_0 (same below)

https://github.com/llvm/llvm-project/pull/124420