[llvm] [RISC-V] Fix incorrect epilogue_begin (PR #120623)

[Venkata Ramanaiah Nalamothu via llvm-commits]

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@@ -0,0 +1,50 @@
+; RUN: llc -mtriple=riscv64 < %s | FileCheck %s
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RamNalamothu wrote:

I am running into different unrelated issues while trying to add a testcase with automated checks, with both LLVM IR and MIR.

And, even if I could achieve that, the assembly is going to be big due to the presence of debug info which I think is not desirable. Probably that's the reason there are no existing codegen tests, e.g. in AArch64 and RISC-V, having debug info meta data along with automated checks.

Is resolving this comment a blocker for this patch?

https://github.com/llvm/llvm-project/pull/120623