[llvm] [RISCV] Generate MIPS load/store pair instructions (PR #124717)

[Anmol P. Paralkar via llvm-commits]

anmolparalkar-nxp wrote:

> @lenary yes it makes sense, thanks! I will talk to @anmolparalkar-nxp :)
Thanks @lenary. @djtodoro we will work together to streamline and unify the approach, thank you.

https://github.com/llvm/llvm-project/pull/124717