[llvm] 8353aa2 - [llvm][Docs] Add LLDB AArch64 GCS Release note

[David Spickett via llvm-commits]

Author: David Spickett
Date: 2025-01-28T12:09:05Z
New Revision: 8353aa2a53b307bfeebb7f8592cc15bb00656c78

URL: https://github.com/llvm/llvm-project/commit/8353aa2a53b307bfeebb7f8592cc15bb00656c78
DIFF: https://github.com/llvm/llvm-project/commit/8353aa2a53b307bfeebb7f8592cc15bb00656c78.diff

LOG: [llvm][Docs] Add LLDB AArch64 GCS Release note

https://github.com/llvm/llvm-project/pull/124295 just
went in and that's the last piece of functionality.

Added: 
    

Modified: 
    llvm/docs/ReleaseNotes.md

Removed: 
    


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diff  --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index 8d89c64df1fa96..29bf284617b433 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -571,6 +571,10 @@ Changes to LLDB
 * LLDB can now read the `fpmr` register from AArch64 Linux processes and core
   files.
 
+* Support was added for debugging AArch64 Linux programs that use the
+  Guarded Control Stack extension (GCS). This includes live processes and core
+  files.
+
 * LLDB now supports execution of user expressions for non-trivial cases for LoongArch and RISC-V targets, like function calls, when some code needs to be executed on the target.
 
 * LLDB now supports optionally enabled/disabled register sets (particularly floating point registers) for RISC-V 64. This happens for targets like `RV64IMAC` or `RV64IMACV`,