[llvm] [RISCV] Select mask operands as virtual registers and eliminate vmv0 (PR #125026)

[Pengcheng Wang via llvm-commits]

https://github.com/wangpc-pp approved this pull request.

Thanks! I just had a quick scan and I like this method to work around the limitation. 
LGTM but please wait for another approval.

https://github.com/llvm/llvm-project/pull/125026