[llvm] [RISCV] Generate MIPS load/store pair instructions (PR #124717)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 28 00:15:44 PST 2025


topperc wrote:

I'm pretty sure some of this is copied from AArch64. That's a helpful thing to mention in the description as it makes it easier to review if we can cross reference the prior art. Can you mention any notable differences?

https://github.com/llvm/llvm-project/pull/124717


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