[llvm] AMDGPU GlobalISel Add64 support (PR #124763)

[Matt Arsenault via llvm-commits]

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@@ -737,6 +737,24 @@ def : ThreeOp_i32_Pats<and, or, V_AND_OR_B32_e64>;
 def : ThreeOp_i32_Pats<or, or, V_OR3_B32_e64>;
 def : ThreeOp_i32_Pats<xor, add, V_XAD_U32_e64>;
 
+let SubtargetPredicate = isGFX940Plus in {
+// TODO: Canonicalize these in the target specific CombinerHelper?
+def : GCNPat<
+  (ptradd (shl i64:$src0, i32:$shift), i64:$src1),
+  (V_LSHL_ADD_U64_e64 VSrc_b64:$src0, VSrc_b32:$shift, VSrc_b64:$src1)
+>;
+
+def : GCNPat<
+  (ptradd i64:$src0, (shl i64:$src1, i32:$shift)),
+  (V_LSHL_ADD_U64_e64 VSrc_b64:$src1, VSrc_b32:$shift, VSrc_b64:$src0)
+>;
+
+def : GCNPat<
+  (ptradd i64:$src0, i64:$src1),
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arsenm wrote:

I think the dag test changed because this dropped any kind of regbank / uniformity predicates. I think if you had these patterns with only SGPR inputs and a required SGPR result it would break 

https://github.com/llvm/llvm-project/pull/124763