[llvm] a1ab5b4 - [SLP]Check the MainOp matches the requirements for the instructions

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2025-01-28T06:00:52-08:00
New Revision: a1ab5b4c87256ce7e99d6fd4bd0c62641e6ce853

URL: https://github.com/llvm/llvm-project/commit/a1ab5b4c87256ce7e99d6fd4bd0c62641e6ce853
DIFF: https://github.com/llvm/llvm-project/commit/a1ab5b4c87256ce7e99d6fd4bd0c62641e6ce853.diff

LOG: [SLP]Check the MainOp matches the requirements for the instructions

Need to include MainOp into the analysis of the instructions in
getSameOpcode to be sure that it is checked for the requirements to
prevent crashes during further analysis.

Added: 
    llvm/test/Transforms/SLPVectorizer/ARM/main-gep-with-non-matching-reqs.ll

Modified: 
    llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index ebf55a0691df18..f73ad1b15891a3 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -963,8 +963,9 @@ static InstructionsState getSameOpcode(ArrayRef<Value *> VL,
       return InstructionsState::invalid();
   }
   bool AnyPoison = InstCnt != VL.size();
-  // Skip MainOp.
-  for (Value *V : iterator_range(It + 1, VL.end())) {
+  // Check MainOp too to be sure that it matches the requirements for the
+  // instructions.
+  for (Value *V : iterator_range(It, VL.end())) {
     auto *I = dyn_cast<Instruction>(V);
     if (!I)
       continue;

diff  --git a/llvm/test/Transforms/SLPVectorizer/ARM/main-gep-with-non-matching-reqs.ll b/llvm/test/Transforms/SLPVectorizer/ARM/main-gep-with-non-matching-reqs.ll
new file mode 100644
index 00000000000000..cf1aec7dde8ac4
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/ARM/main-gep-with-non-matching-reqs.ll
@@ -0,0 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S --passes=slp-vectorizer -mtriple=thumb7 -mcpu=swift < %s | FileCheck %s
+
+define i32 @test(ptr  %0) {
+; CHECK-LABEL: define i32 @test(
+; CHECK-SAME: ptr [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[CONT2:.*:]]
+; CHECK-NEXT:    [[ARRAYIDX518:%.*]] = getelementptr i16, ptr [[TMP0]], i32 0
+; CHECK-NEXT:    [[CMP524_NOT:%.*]] = icmp eq ptr [[ARRAYIDX518]], null
+; CHECK-NEXT:    [[ARRAYIDX482_2:%.*]] = getelementptr [4 x i16], ptr null, i32 0, i32 0
+; CHECK-NEXT:    [[CMP487_NOT_2:%.*]] = icmp eq ptr [[ARRAYIDX482_2]], null
+; CHECK-NEXT:    ret i32 0
+;
+cont2:
+  %arrayidx518 = getelementptr i16, ptr  %0, i32 0
+  %cmp524.not = icmp eq ptr  %arrayidx518, null
+  %cmp487.not.3 = icmp eq ptr  null, null
+  %arrayidx482.2 = getelementptr [4 x i16], ptr  null, i32 0, i32 0
+  %cmp487.not.2 = icmp eq ptr  %arrayidx482.2, null
+  %cmp487.not.1 = icmp eq ptr  null, null
+  ret i32 0
+}