[llvm] [RISCV] Add ESWIN EIC770X (SiFive P550) to getHostCPUNameForRISCV. (PR #125277)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 31 11:57:49 PST 2025
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/125277
This enables -mcpu=native for the HiFive Premier P550 board.
>From d749895ae32ad38b60180179f06a375e672d505c Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 31 Jan 2025 11:56:14 -0800
Subject: [PATCH] [RISCV] Add ESWIN EIC770X (SiFive P550) to
getHostCPUNameForRISCV.
This enables -mcpu=native for the HiFive Premier P550 board.
---
llvm/lib/TargetParser/Host.cpp | 1 +
llvm/unittests/TargetParser/Host.cpp | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index fa57ae183bb84a..d6a16143fe9e97 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -493,6 +493,7 @@ StringRef sys::detail::getHostCPUNameForRISCV(StringRef ProcCpuinfoContent) {
}
return StringSwitch<const char *>(UArch)
+ .Case("eswin,eic770x", "sifive-p550")
.Case("sifive,u74-mc", "sifive-u74")
.Case("sifive,bullet0", "sifive-u74")
.Default("");
diff --git a/llvm/unittests/TargetParser/Host.cpp b/llvm/unittests/TargetParser/Host.cpp
index c5b96e1df904e6..6eb13649a59040 100644
--- a/llvm/unittests/TargetParser/Host.cpp
+++ b/llvm/unittests/TargetParser/Host.cpp
@@ -405,6 +405,19 @@ uarch : sifive,u74-mc
EXPECT_EQ(
sys::detail::getHostCPUNameForRISCV("uarch : sifive,bullet0\n"),
"sifive-u74");
+
+ const StringRef SifiveP550MCProcCPUInfo = R"(
+processor : 0
+hart : 2
+isa : rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf
+mmu : sv48
+uarch : eswin,eic770x
+)";
+ EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(SifiveP550MCProcCPUInfo),
+ "sifive-p550");
+ EXPECT_EQ(
+ sys::detail::getHostCPUNameForRISCV("uarch : eswin,eic770x\n"),
+ "sifive-p550");
}
static bool runAndGetCommandOutput(
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