[llvm] c7d4ccf - [PowerPC] Autogenerate a test checks in preparation for follow-up commit
Alex Richardson via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 31 12:02:24 PST 2025
Author: Alex Richardson
Date: 2025-01-31T12:01:31-08:00
New Revision: c7d4ccfd836b45bd589956e7485c2647d8912a69
URL: https://github.com/llvm/llvm-project/commit/c7d4ccfd836b45bd589956e7485c2647d8912a69
DIFF: https://github.com/llvm/llvm-project/commit/c7d4ccfd836b45bd589956e7485c2647d8912a69.diff
LOG: [PowerPC] Autogenerate a test checks in preparation for follow-up commit
This just adds more lines that are checked
Added:
Modified:
llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll b/llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
index fb1dbadd48e816..4ab1aac8ef8d8b 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-min-jump-table-entries=4 < %s | FileCheck %s \
; RUN: --check-prefix=CHECK-R
@@ -19,27 +20,89 @@
define dso_local signext i32 @jumptable(i32 signext %param) {
; CHECK-R-LABEL: jumptable:
-; CHECK-R: # %bb.1: # %entry
-; CHECK-R-NEXT: rldic r4, r4
+; CHECK-R: # %bb.0: # %entry
+; CHECK-R-NEXT: addi r4, r3, -1
+; CHECK-R-NEXT: cmplwi r4, 19
+; CHECK-R-NEXT: bgt cr0, .LBB0_3
+; CHECK-R-NEXT: # %bb.1: # %entry
+; CHECK-R-NEXT: rldic r4, r4, 2, 30
; CHECK-R-NEXT: paddi r5, 0, .LJTI0_0 at PCREL, 1
; CHECK-R-NEXT: lwax r4, r4, r5
; CHECK-R-NEXT: add r4, r4, r5
; CHECK-R-NEXT: mtctr r4
; CHECK-R-NEXT: bctr
+; CHECK-R-NEXT: .LBB0_2: # %sw.bb1
+; CHECK-R-NEXT: li r3, 4
+; CHECK-R-NEXT: blr
+; CHECK-R-NEXT: .LBB0_3: # %sw.default
+; CHECK-R-NEXT: li r3, -1
+; CHECK-R-NEXT: .LBB0_4: # %return
+; CHECK-R-NEXT: blr
+; CHECK-R-NEXT: .LBB0_5: # %sw.bb2
+; CHECK-R-NEXT: li r3, 9
+; CHECK-R-NEXT: blr
+; CHECK-R-NEXT: .LBB0_6: # %sw.bb3
+; CHECK-R-NEXT: li r3, 16
+; CHECK-R-NEXT: blr
+; CHECK-R-NEXT: .LBB0_7: # %sw.bb4
+; CHECK-R-NEXT: li r3, 400
+; CHECK-R-NEXT: blr
+;
; CHECK-A-LE-LABEL: jumptable:
-; CHECK-A-LE: # %bb.1: # %entry
-; CHECK-A-LE-NEXT: rldic r4, r4
+; CHECK-A-LE: # %bb.0: # %entry
+; CHECK-A-LE-NEXT: addi r4, r3, -1
+; CHECK-A-LE-NEXT: cmplwi r4, 19
+; CHECK-A-LE-NEXT: bgt cr0, .LBB0_3
+; CHECK-A-LE-NEXT: # %bb.1: # %entry
+; CHECK-A-LE-NEXT: rldic r4, r4, 3, 29
; CHECK-A-LE-NEXT: paddi r5, 0, .LJTI0_0 at PCREL, 1
; CHECK-A-LE-NEXT: ldx r4, r4, r5
; CHECK-A-LE-NEXT: mtctr r4
; CHECK-A-LE-NEXT: bctr
+; CHECK-A-LE-NEXT: .LBB0_2: # %sw.bb1
+; CHECK-A-LE-NEXT: li r3, 4
+; CHECK-A-LE-NEXT: blr
+; CHECK-A-LE-NEXT: .LBB0_3: # %sw.default
+; CHECK-A-LE-NEXT: li r3, -1
+; CHECK-A-LE-NEXT: .LBB0_4: # %return
+; CHECK-A-LE-NEXT: blr
+; CHECK-A-LE-NEXT: .LBB0_5: # %sw.bb2
+; CHECK-A-LE-NEXT: li r3, 9
+; CHECK-A-LE-NEXT: blr
+; CHECK-A-LE-NEXT: .LBB0_6: # %sw.bb3
+; CHECK-A-LE-NEXT: li r3, 16
+; CHECK-A-LE-NEXT: blr
+; CHECK-A-LE-NEXT: .LBB0_7: # %sw.bb4
+; CHECK-A-LE-NEXT: li r3, 400
+; CHECK-A-LE-NEXT: blr
+;
; CHECK-A-BE-LABEL: jumptable:
-; CHECK-A-BE: # %bb.1: # %entry
-; CHECK-A-BE-NEXT: rldic r4, r4
+; CHECK-A-BE: # %bb.0: # %entry
+; CHECK-A-BE-NEXT: addi r4, r3, -1
+; CHECK-A-BE-NEXT: cmplwi r4, 19
+; CHECK-A-BE-NEXT: bgt cr0, .LBB0_3
+; CHECK-A-BE-NEXT: # %bb.1: # %entry
+; CHECK-A-BE-NEXT: rldic r4, r4, 2, 30
; CHECK-A-BE-NEXT: paddi r5, 0, .LJTI0_0 at PCREL, 1
; CHECK-A-BE-NEXT: lwax r4, r4, r5
; CHECK-A-BE-NEXT: mtctr r4
; CHECK-A-BE-NEXT: bctr
+; CHECK-A-BE-NEXT: .LBB0_2: # %sw.bb1
+; CHECK-A-BE-NEXT: li r3, 4
+; CHECK-A-BE-NEXT: blr
+; CHECK-A-BE-NEXT: .LBB0_3: # %sw.default
+; CHECK-A-BE-NEXT: li r3, -1
+; CHECK-A-BE-NEXT: .LBB0_4: # %return
+; CHECK-A-BE-NEXT: blr
+; CHECK-A-BE-NEXT: .LBB0_5: # %sw.bb2
+; CHECK-A-BE-NEXT: li r3, 9
+; CHECK-A-BE-NEXT: blr
+; CHECK-A-BE-NEXT: .LBB0_6: # %sw.bb3
+; CHECK-A-BE-NEXT: li r3, 16
+; CHECK-A-BE-NEXT: blr
+; CHECK-A-BE-NEXT: .LBB0_7: # %sw.bb4
+; CHECK-A-BE-NEXT: li r3, 400
+; CHECK-A-BE-NEXT: blr
entry:
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