[llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)

[Jay Foad via llvm-commits]

jayfoad wrote:

> When set, it will disallow buffer accesses with alignment lower than natural alignment.

To be more precise, it will prevent passes like SILoadStoreOptimizer from introducing _new_ loads/stores (by combining existing loads/stores) that are not naturally aligned, right? Is this based on known alignment of the access, or just by checking the alignment of the _offset_ from the start of the buffer?

I think this will fix the bounds checking problem that you explain, but only if we can guarantee that the start of the buffer is at least as aligned as the largest buffer load/store we can generate, which is 16 bytes for a dwordx4 access.

https://github.com/llvm/llvm-project/pull/115479