[llvm] [RISCV] Fold vector shift of sext/zext to widening multiply (PR #121563)

[Piotr Fusik via llvm-commits]

pfusik wrote:

I've heard that this transform won't be profitable on other CPUs, so I added a commit that enables it on BPI's SpacemiT X60 only. Basing on https://camel-cdr.github.io/rvv-bench-results/canmv_k230/ perhaps K230 too, but I don't have one to confirm.

The sole presence of Zvbb doesn't preclude this transform, because `vwsll.vi` only does zero-extension, while widening multiply comes in the sign-extending variant as well.

https://github.com/llvm/llvm-project/pull/121563