[llvm] [AMDGPU] Filter candidates of LiveRegOptimizer for profitable cases (PR #124624)

Jeffrey Byrnes via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 29 11:53:07 PST 2025


================
@@ -461,40 +2135,87 @@ define amdgpu_kernel void @v8i8_phi_zeroinit(ptr addrspace(1) %src1, ptr addrspa
 ; GFX906-LABEL: v8i8_phi_zeroinit:
 ; GFX906:       ; %bb.0: ; %entry
 ; GFX906-NEXT:    s_load_dwordx8 s[8:15], s[4:5], 0x24
-; GFX906-NEXT:    v_lshlrev_b32_e32 v5, 3, v0
+; GFX906-NEXT:    v_lshlrev_b32_e32 v4, 3, v0
 ; GFX906-NEXT:    v_cmp_lt_u32_e64 s[0:1], 14, v0
 ; GFX906-NEXT:    v_cmp_gt_u32_e32 vcc, 15, v0
-; GFX906-NEXT:    ; implicit-def: $vgpr1_vgpr2
+; GFX906-NEXT:    ; implicit-def: $vgpr3
+; GFX906-NEXT:    ; implicit-def: $vgpr13
+; GFX906-NEXT:    ; implicit-def: $vgpr11
+; GFX906-NEXT:    ; implicit-def: $vgpr14
+; GFX906-NEXT:    ; implicit-def: $vgpr15
+; GFX906-NEXT:    ; implicit-def: $vgpr12
+; GFX906-NEXT:    ; implicit-def: $vgpr16
 ; GFX906-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX906-NEXT:    global_load_dwordx2 v[3:4], v5, s[8:9]
+; GFX906-NEXT:    global_load_dwordx2 v[1:2], v4, s[8:9]
+; GFX906-NEXT:    s_waitcnt vmcnt(0)
+; GFX906-NEXT:    v_lshrrev_b32_e32 v5, 24, v2
+; GFX906-NEXT:    v_lshrrev_b32_e32 v10, 16, v2
+; GFX906-NEXT:    v_lshrrev_b32_e32 v7, 8, v2
+; GFX906-NEXT:    v_lshrrev_b32_e32 v6, 24, v1
+; GFX906-NEXT:    v_lshrrev_b32_e32 v8, 16, v1
+; GFX906-NEXT:    v_lshrrev_b32_e32 v9, 8, v1
 ; GFX906-NEXT:    s_and_saveexec_b64 s[2:3], vcc
 ; GFX906-NEXT:    s_cbranch_execz .LBB9_2
 ; GFX906-NEXT:  ; %bb.1: ; %bb.1
-; GFX906-NEXT:    global_load_dwordx2 v[1:2], v5, s[10:11]
-; GFX906-NEXT:    s_mov_b32 s4, 0
+; GFX906-NEXT:    global_load_dwordx2 v[3:4], v4, s[10:11]
 ; GFX906-NEXT:    v_cmp_gt_u32_e32 vcc, 7, v0
-; GFX906-NEXT:    s_mov_b32 s5, s4
-; GFX906-NEXT:    s_waitcnt vmcnt(1)
-; GFX906-NEXT:    v_mov_b32_e32 v3, s4
-; GFX906-NEXT:    v_mov_b32_e32 v4, s5
+; GFX906-NEXT:    v_mov_b32_e32 v1, 0
 ; GFX906-NEXT:    s_andn2_b64 s[0:1], s[0:1], exec
 ; GFX906-NEXT:    s_and_b64 s[4:5], vcc, exec
+; GFX906-NEXT:    v_mov_b32_e32 v5, 0
+; GFX906-NEXT:    v_mov_b32_e32 v9, 0
+; GFX906-NEXT:    v_mov_b32_e32 v8, 0
+; GFX906-NEXT:    v_mov_b32_e32 v6, 0
+; GFX906-NEXT:    v_mov_b32_e32 v2, v1
+; GFX906-NEXT:    v_mov_b32_e32 v7, v1
 ; GFX906-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]
+; GFX906-NEXT:    v_mov_b32_e32 v10, v1
+; GFX906-NEXT:    s_waitcnt vmcnt(0)
+; GFX906-NEXT:    v_lshrrev_b32_e32 v16, 24, v4
+; GFX906-NEXT:    v_lshrrev_b32_e32 v12, 16, v4
+; GFX906-NEXT:    v_lshrrev_b32_e32 v15, 8, v4
+; GFX906-NEXT:    v_lshrrev_b32_e32 v14, 24, v3
+; GFX906-NEXT:    v_lshrrev_b32_e32 v11, 16, v3
+; GFX906-NEXT:    v_lshrrev_b32_e32 v13, 8, v3
 ; GFX906-NEXT:  .LBB9_2: ; %Flow
 ; GFX906-NEXT:    s_or_b64 exec, exec, s[2:3]
 ; GFX906-NEXT:    s_and_saveexec_b64 s[2:3], s[0:1]
 ; GFX906-NEXT:    s_cbranch_execz .LBB9_4
 ; GFX906-NEXT:  ; %bb.3: ; %bb.2
-; GFX906-NEXT:    s_waitcnt vmcnt(0)
-; GFX906-NEXT:    v_mov_b32_e32 v1, v3
+; GFX906-NEXT:    v_lshlrev_b16_e32 v3, 8, v9
+; GFX906-NEXT:    v_lshlrev_b16_e32 v4, 8, v6
+; GFX906-NEXT:    v_or_b32_sdwa v3, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT:    v_or_b32_sdwa v4, v8, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT:    v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT:    v_lshlrev_b16_e32 v4, 8, v7
+; GFX906-NEXT:    v_lshlrev_b16_e32 v11, 8, v5
+; GFX906-NEXT:    v_or_b32_sdwa v4, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT:    v_or_b32_sdwa v11, v10, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
 ; GFX906-NEXT:    v_mov_b32_e32 v0, 0
-; GFX906-NEXT:    v_mov_b32_e32 v2, v4
+; GFX906-NEXT:    v_or_b32_sdwa v4, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
 ; GFX906-NEXT:    global_store_dwordx2 v0, v[3:4], s[12:13]
+; GFX906-NEXT:    v_mov_b32_e32 v3, v1
+; GFX906-NEXT:    v_mov_b32_e32 v13, v9
+; GFX906-NEXT:    v_mov_b32_e32 v11, v8
+; GFX906-NEXT:    v_mov_b32_e32 v14, v6
+; GFX906-NEXT:    v_mov_b32_e32 v4, v2
+; GFX906-NEXT:    v_mov_b32_e32 v15, v7
+; GFX906-NEXT:    v_mov_b32_e32 v12, v10
+; GFX906-NEXT:    v_mov_b32_e32 v16, v5
 ; GFX906-NEXT:  .LBB9_4: ; %bb.3
 ; GFX906-NEXT:    s_or_b64 exec, exec, s[2:3]
-; GFX906-NEXT:    v_mov_b32_e32 v0, 0
-; GFX906-NEXT:    s_waitcnt vmcnt(0)
-; GFX906-NEXT:    global_store_dwordx2 v0, v[1:2], s[14:15]
+; GFX906-NEXT:    v_lshlrev_b16_e32 v0, 8, v13
+; GFX906-NEXT:    v_lshlrev_b16_e32 v1, 8, v14
+; GFX906-NEXT:    v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT:    v_or_b32_sdwa v1, v11, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT:    v_lshlrev_b16_e32 v1, 8, v15
+; GFX906-NEXT:    v_lshlrev_b16_e32 v3, 8, v16
+; GFX906-NEXT:    v_or_b32_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT:    v_or_b32_sdwa v3, v12, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX906-NEXT:    v_mov_b32_e32 v2, 0
+; GFX906-NEXT:    v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX906-NEXT:    global_store_dwordx2 v2, v[0:1], s[14:15]
----------------
jrbyrnes wrote:

Ditto

https://github.com/llvm/llvm-project/pull/124624


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