The Week Of Monday 16 February 2026 Archives by date

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Starting: Mon Feb 16 00:01:58 PST 2026
Ending: Sun Feb 22 23:59:44 PST 2026
Messages: 6425

• [llvm] [VPlan] Factor common VPDT-sort in sink-replicate (NFC) (PR #179214)   LLVM Continuous Integration via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] 2380e12 - [RISCV] Start zvlsseg-spill.mir test before regalloc. NFC   Luke Lau via llvm-commits
• [llvm] 820d15c - [RISCV] Add test for reducing vl of vlseg2e32.v. NFC   Luke Lau via llvm-commits
• [llvm] [VPlan] Factor common VPDT-sort in sink-replicate (NFC) (PR #179214)   LLVM Continuous Integration via llvm-commits
• [llvm] [SCEVDivision] Prevent propagation of incorrect no-wrap flags (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ryotaro Kasuga via llvm-commits
• [llvm] 7bf2d5f - [x86] Enable indirect tail calls with more arguments (#137643)   via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Hans Wennborg via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   James Henderson via llvm-commits
• [llvm] [bolt][nfc] fix typo in test (PR #181611)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][nfc] fix typo in test (PR #181611)   via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Carl Ritson via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   Nikita Popov via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   via llvm-commits
• [llvm] [bolt][nfc] fix typo in test (PR #181611)   YongKang Zhu via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Fei Peng via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   via llvm-commits
• [llvm] [NVPTX] Composable and Extensible Memory Cache Control Hints (PR #175901)   Fei Peng via llvm-commits
• [llvm] [bolt][nfc] fix typo in test (PR #181611)   Alexey Moksyakov via llvm-commits
• [llvm] 074391e - [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (#179940)   via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [bolt][nfc] fix typo in test (PR #181611)   Alexey Moksyakov via llvm-commits
• [llvm] 88c0a1d - Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (#181545)   via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #181545)   Benjamin Maxwell via llvm-commits
• [llvm] [BOLT] Mark BOLTReserved segment executable (PR #181606)   YongKang Zhu via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   Omair Javaid via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Dark Steve via llvm-commits
• [llvm] f152625 - [Support] Fixup for formatting hex on 32 bit (#181338)   via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   Konrad Kleine via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Demetrius Kanios via llvm-commits
• [flang] [llvm] [flang][mlir] Add flang to mlir lowering for dyn_groupprivate (PR #180938)   via llvm-commits
• [flang] [llvm] [flang][mlir] Add flang to mlir lowering for dyn_groupprivate (PR #180938)   via llvm-commits
• [flang] [llvm] [flang][mlir] Add flang to mlir lowering for dyn_groupprivate (PR #180938)   via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Dark Steve via llvm-commits
• [llvm] e698d03 - [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (#154745)   via llvm-commits
• [llvm] [SCEVDivision] Prevent propagating nowrap flags when numerator is an addrec (PR #154745)   Ryotaro Kasuga via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Heejin Ahn via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Madhur Amilkanthwar via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Madhur Amilkanthwar via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   Luke Lau via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   via llvm-commits
• [llvm] bde3ef4 - [ARM] Move MVE test into the correct place. NFC   David Green via llvm-commits
• [libc] [llvm] [libc][math] Refactor canonicalize family to header-only (PR #181467)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor canonicalize family to header-only (PR #181467)   Muhammad Bassiouni via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   David Green via llvm-commits
• [llvm] [ARM] Treat strictfp vector rounding operations as legal (PR #180480)   David Green via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addf to header only (PR #181230)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addf to header only (PR #181230)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   Muhammad Bassiouni via llvm-commits
• [llvm] [AMDGPU] Add VDSDIR encoding to gfx13 (PR #181620)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VDSDIR encoding to gfx13 (PR #181620)   via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   Muhammad Bassiouni via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #178750)   Muhammad Bassiouni via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Pranshu Goyal via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Pranshu Goyal via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [libc] [llvm] [libc][math] Refactor sincos implementation to header only (PR #177522)   Muhammad Bassiouni via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor atanpif16 to Header Only. (PR #179158)   Muhammad Bassiouni via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   Muhammad Bassiouni via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] 2b7c1f9 - [VPlan] Directly unroll VectorEndPointerRecipe (#172372)   via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [polly] 3272ba7 - [Polly] Honor 'scops' phase being disabled (#180380)   via llvm-commits
• [polly] [Polly] Honor 'scops' phase being disabled (PR #180380)   Michael Kruse via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   Pierre van Houtryve via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   Luke Lau via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Julian Pokrovsky via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [NFC][CodeGen] Use std::move to avoid copy (PR #181623)   via llvm-commits
• [libc] [llvm] [libc] refactor bf16div to be header-only and constexpr (PR #181400)   Muhammad Bassiouni via llvm-commits
• [llvm] b205396 - [IR] Add ConstantExpr::getPtrAdd() (#181365)   via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getPtrAdd() (PR #181365)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   Simon Tatham via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   David Green via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Madhur Amilkanthwar via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopInterchange] Update tests for reduction2mem (NFC) (PR #181629)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update tests for reduction2mem (NFC) (PR #181629)   via llvm-commits
• [llvm] [LoopInterchange] Update tests for reduction2mem (NFC) (PR #181629)   Ryotaro Kasuga via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #181597)   Simon Pilgrim via llvm-commits
• [llvm] [GlobalISel] Add G_UDIV/G_SDIV computeKnownBits (PR #181307)   David Green via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   David Green via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - cleanup check prefixes and regnerate (PR #181631)   Simon Pilgrim via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - cleanup check prefixes and regnerate (PR #181631)   Simon Pilgrim via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Serge Pavlov via llvm-commits
• [llvm] [OffloadWrapper] Remove unnecessary zero-index GEPs (PR #181632)   Nikita Popov via llvm-commits
• [llvm] aa31013 - [SPIRV] Rounding Mode decorations in OpenCL builtins only make sense when floating point types are involved (#181208)   via llvm-commits
• [llvm] [SPIRV] Rounding Mode decorations in OpenCL builtins only make sense when floating point types are involved (PR #181208)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Disable spirv-val in tests for constrained intrinsics (PR #181516)   Sven van Haastregt via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +pcdphint gating (PR #181633)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +pcdphint gating (PR #181633)   Jonathan Thackray via llvm-commits
• [llvm] [OffloadWrapper] Remove unnecessary zero-index GEPs (PR #181632)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanf16 to header only (PR #181523)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif to header only (PR #181525)   Xinlong Chen via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +pcdphint gating (PR #181633)   Jonathan Thackray via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanf16 to header only (PR #181523)   Xinlong Chen via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +pcdphint gating (PR #181633)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif to header only (PR #181525)   Xinlong Chen via llvm-commits
• [clang] [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Dmitry Vyukov via llvm-commits
• [llvm] a591a44 - [tsan] Introduce Adaptive Delay Scheduling to TSAN (#178836)   via llvm-commits
• [clang] [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Dmitry Vyukov via llvm-commits
• [llvm] [MemCpyOptimizer] Prevent Merging a Store Into Memset of an `undef` (PR #181609)   Nikita Popov via llvm-commits
• [clang] [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Dmitry Vyukov via llvm-commits
• [llvm] [NFC][SPIRV] Disable spirv-val in tests for constrained intrinsics (PR #181516)   Dmitry Sidorov via llvm-commits
• [llvm] 339e200 - [NFC][SPIRV] Disable spirv-val in tests for constrained intrinsics (#181516)   via llvm-commits
• [llvm] [NFC][SPIRV] Disable spirv-val in tests for constrained intrinsics (PR #181516)   Dmitry Sidorov via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - use switch() to match against each opcode. NFC. (PR #181637)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - use switch() to match against each opcode. NFC. (PR #181637)   via llvm-commits
• [llvm] ef86449 - `dwarf2yaml.cpp` optimizations (#179048)   via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   James Henderson via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Avoid VectorPointer bail in narrowInterleaveGroups (PR #172286)   Ramkumar Ramachandra via llvm-commits
• [llvm] 2c194a1 - [X86] broadcast-elm-cross-splat-vec.ll - cleanup check prefixes and regnerate (#181631)   via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - cleanup check prefixes and regnerate (PR #181631)   Simon Pilgrim via llvm-commits
• [llvm] 37adb1d - [GCOVProfiling] Remove unnecessary zero-index GEPs   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - use switch() to match against each opcode. NFC. (PR #181637)   Nikita Popov via llvm-commits
• [llvm] dc34267 - [OffloadWrapper] Remove unnecessary zero-index GEPs (#181632)   via llvm-commits
• [llvm] [OffloadWrapper] Remove unnecessary zero-index GEPs (PR #181632)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] e216dc2 - [OpenMPIRBuilderTest] Remove unnecessary zero-index GEP   Nikita Popov via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - avoid AND(ADD(X, 1), 1) pattern in tests (PR #181638)   Simon Pilgrim via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - avoid AND(ADD(X, 1), 1) pattern in tests (PR #181638)   Simon Pilgrim via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - avoid AND(ADD(X, 1), 1) pattern in tests (PR #181638)   Simon Pilgrim via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   Kiran Chandramohan via llvm-commits
• [llvm] [AArch64] optimize manual addp (PR #181549)   David Green via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - avoid AND(ADD(X, 1), 1) pattern in tests (PR #181638)   Simon Pilgrim via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   Kiran Chandramohan via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getInBoundsPtrAdd() (PR #181639)   Nikita Popov via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getInBoundsPtrAdd() (PR #181639)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Jay Foad via llvm-commits
• [llvm] 20aff20 - [DAG] isKnownToBeAPowerOfTwo - use switch() to match against each opcode. NFC. (#181637)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - use switch() to match against each opcode. NFC. (PR #181637)   Simon Pilgrim via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Kareem Ergawy via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [WebAssembly] Fix null Subtarget crash for addrspace(1) globals (PR #181536)   via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Jay Foad via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [NFC][SPIRV] Rework `isConstReg` to remove `SPIRVType` (PR #181647)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rework `isConstReg` to remove `SPIRVType` (PR #181647)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [SafeStack] Use ptrmask instead of ptrtoint+and+inttoptr (PR #181649)   Nikita Popov via llvm-commits
• [llvm] [SafeStack] Use ptrmask instead of ptrtoint+and+inttoptr (PR #181649)   via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getInBoundsPtrAdd() (PR #181639)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV][backend] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [GIsel] port `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Jay Foad via llvm-commits
• [llvm] [NFC][SPIRV] Remove `SPIRVType` from comments (PR #181652)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Remove `SPIRVType` from comments (PR #181652)   via llvm-commits
• [llvm] [NFC][SPIRV] Remove `SPIRVType` from comments (PR #181652)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [bolt][nfc] Exclude Call id verification from instrument-ind-call test (PR #181655)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][nfc] Exclude Call id verification from instrument-ind-call test (PR #181655)   via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Osman Yasar via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [clang] [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   LLVM Continuous Integration via llvm-commits
• [llvm] [ARM] Treat strictfp vector rounding operations as legal (PR #180480)   Serge Pavlov via llvm-commits
• [llvm] a250eda - [X86] broadcast-elm-cross-splat-vec.ll - avoid AND(ADD(X,1),1) pattern in tests (#181638)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - avoid AND(ADD(X, 1), 1) pattern in tests (PR #181638)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [llvm] [AArch64] Prefer SVE for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] optimize manual addp (PR #181549)   Folkert de Vries via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Mariusz Sikora via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Pranshu Goyal via llvm-commits
• [llvm] [AArch64] optimize manual addp (PR #181549)   Folkert de Vries via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getInBoundsPtrAdd() (PR #181639)   Aiden Grossman via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Dmitry Sidorov via llvm-commits
• [llvm] [AArch64] optimize manual addp (PR #181549)   Folkert de Vries via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [llvm] aef9959 - [IR] Add ConstantExpr::getInBoundsPtrAdd() (#181639)   via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getInBoundsPtrAdd() (PR #181639)   Nikita Popov via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [llvm] [SLP] Check for extracts, being replaced by original scalars, for user nodes (PR #149572)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Check for extracts, being replaced by original scalars, for user nodes (PR #149572)   Alexey Bataev via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +cmh gating (PR #181662)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +cmh gating (PR #181662)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getInBoundsPtrAdd() (PR #181639)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +cmh gating (PR #181662)   Jonathan Thackray via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Pekka Jääskeläinen via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Pekka Jääskeläinen via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Omair Javaid via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +cmh gating (PR #181662)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +cmh gating (PR #181662)   via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Mariusz Sikora via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [clang] [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Oliver Stöneberg via llvm-commits
• [llvm] [NFC][SPIRV] Remove uses of `SPIRVType` in `SPIRVUtils` (PR #181663)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Remove uses of `SPIRVType` in `SPIRVUtils` (PR #181663)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Remove uses of `SPIRVType` in `SPIRVUtils` (PR #181663)   via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Luke Lau via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   via llvm-commits
• [llvm] [bolt][nfc] Exclude Call id verification from instrument-ind-call test (PR #181655)   Paschalis Mpeis via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Ramkumar Ramachandra via llvm-commits
• [llvm] [bolt][nfc] Exclude Call id verification from instrument-ind-call test (PR #181655)   Paschalis Mpeis via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Jay Foad via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Jay Foad via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Luke Lau via llvm-commits
• [llvm] [X86] broadcast-elm-cross-splat-vec.ll - avoid AND(ADD(X, 1), 1) pattern in tests (PR #181638)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIRV] Fix `SPIRVTypeInst` `DenseMapInfo` implementation (PR #181667)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Madhur Kumar via llvm-commits
• [llvm] [SPIRV] Fix `SPIRVTypeInst` `DenseMapInfo` implementation (PR #181667)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 3765b09 - [AMDGPU] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [SPIRV] Fix `SPIRVTypeInst` `DenseMapInfo` implementation (PR #181667)   via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Dmitry Sidorov via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [llvm] [MemCpyOptimizer] Prevent Merging a Store Into Memset of an `undef` (PR #181609)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] [NFC][SPIRV] Remove `SPIRVType` from comments (PR #181652)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] fb0a3a8 - [MemCpyOptimizer] Prevent Merging a Store Into Memset of an `undef` (#181609)   via llvm-commits
• [llvm] [MemCpyOptimizer] Prevent Merging a Store Into Memset of an `undef` (PR #181609)   via llvm-commits
• [llvm] [bolt][nfc] Exclude Call id verification from instrument-ind-call test (PR #181655)   Alexey Moksyakov via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   Osman Yasar via llvm-commits
• [llvm] [bolt][nfc] Exclude Call id verification from instrument-ind-call test (PR #181655)   Alexey Moksyakov via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC][SPIRV] Remove uses of `SPIRVType` in `SPIRVUtils` (PR #181663)   Nathan Gauër via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (PR #181671)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [llvm] [AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (PR #181671)   via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Dmitry Sidorov via llvm-commits
• [clang] [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getInBoundsPtrAdd() (PR #181639)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   Luisa Cicolini via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextafter family to header-only (PR #181673)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextafter family to header-only (PR #181673)   via llvm-commits
• [llvm] [AMDGPU] Add VDSDIR encoding to gfx13 (PR #181620)   Joe Nash via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Mariusz Sikora via llvm-commits
• [llvm] [AArch64] optimize manual addp (PR #181549)   Folkert de Vries via llvm-commits
• [llvm] [NFC][SPIRV] Remove uses of `SPIRVType` in `SPIRVUtils` (PR #181663)   Dmitry Sidorov via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Jay Foad via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   David Stuttard via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   via llvm-commits
• [llvm] [MemCpyOptimizer] Prevent Merging a Store Into Memset of an `undef` (PR #181609)   LLVM Continuous Integration via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Luisa Cicolini via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [clang] [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Luke Lau via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Luke Lau via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Luisa Cicolini via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Jay Foad via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [lld] [NFC][ELF] Remove unused Config::hasTlsIe (PR #181680)   Jessica Clarke via llvm-commits
• [lld] [NFC][ELF] Remove unused Config::hasTlsIe (PR #181680)   via llvm-commits
• [lld] [NFC][ELF] Remove unused Config::hasTlsIe (PR #181680)   via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Cullen Rhodes via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   Osman Yasar via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   Gergo Stomfai via llvm-commits
• [llvm] 6288248 - [NFC][SPIRV] Remove uses of `SPIRVType` in `SPIRVUtils` (#181663)   via llvm-commits
• [llvm] [NFC][SPIRV] Remove uses of `SPIRVType` in `SPIRVUtils` (PR #181663)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::removeMatchingExtensions` (PR #171809)   Michael Kruse via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [llvm] Add SuperH (1-4a) target (PR #181287)   via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   Gergo Stomfai via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Michael Kruse via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Michael Kruse via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Michael Kruse via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   Gergo Stomfai via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Luisa Cicolini via llvm-commits
• [libc] [llvm] [libc][math] Refactor nexttoward family to header-only (PR #181685)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nexttoward family to header-only (PR #181685)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Pekka Jääskeläinen via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [libc] [llvm] [libc] refactor bf16div to be header-only and constexpr (PR #181400)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [llvm] [OFFLOAD] New bintool to extract images from binaries (PR #181689)   Alex Duran via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [libc] [llvm] [openmp] [libc] Replace RPC 'close()' mechanism with RAII handler (PR #181690)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] New bintool to extract images from binaries (PR #181689)   via llvm-commits
• [llvm] [OFFLOAD] New bintool to extract images from binaries (PR #181689)   Alex Duran via llvm-commits
• [libc] [llvm] [openmp] [libc] Replace RPC 'close()' mechanism with RAII handler (PR #181690)   via llvm-commits
• [llvm] [NFC][SPIRV] Rework `isConstReg` to remove `SPIRVType` (PR #181647)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [libc] [llvm] [openmp] [libc] Replace RPC 'close()' mechanism with RAII handler (PR #181690)   Jon Chesterfield via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [llvm] [flang][OpenMP] Make isPrivatizingClause version-sensitive (PR #181691)   Krzysztof Parzyszek via llvm-commits
• [llvm] [flang][OpenMP] Make isPrivatizingClause version-sensitive (PR #181691)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [libc] [llvm] [libc][math] Refactor sincos implementation to header only (PR #177522)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   via llvm-commits
• [lld] [lld][Webassembly] Avoid a signed overflow on large sections (PR #178287)   Omair Javaid via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   Alexandros Lamprineas via llvm-commits
• [llvm] [VPlan] Plumb reduction FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [VPlan] Plumb reduction FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   via llvm-commits
• [llvm] [VPlan] Plumb reduction FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Madhur Amilkanthwar via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Madhur Amilkanthwar via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   Ferran Toda via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   Jay Foad via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor sincos implementation to header only (PR #177522)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor sincos implementation to header only (PR #177522)   via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [libc] [llvm] [libc][math] Refactor sincos implementation to header only (PR #177522)   via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [llvm-c] Add EmulatedTLS and EnableTLSDESC to LLVMTargetMachineOptions (PR #161155)   Julien Portalier via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::removeMatchingExtensions` (PR #171809)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::removeMatchingExtensions` (PR #171809)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::removeMatchingExtensions` (PR #171809)   Ryotaro Kasuga via llvm-commits
• [libc] [llvm] [libc] Support array tags in the RPC dispatch helpers (PR #181395)   Joseph Huber via llvm-commits
• [clang] [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][Webassembly] Avoid a signed overflow on large sections (PR #178287)   Omair Javaid via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   via llvm-commits
• [llvm] 67e56cf - [NFCI][Coroutines] update tests to autogenerated formatting (#178358)   via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Jameson Nash via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   Jay Foad via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-c] Add EmulatedTLS and EnableTLSDESC to LLVMTargetMachineOptions (PR #161155)   Julien Portalier via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Simon Pilgrim via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   Yanzuo Liu via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +pcdphint gating (PR #181633)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +pcdphint gating (PR #181633)   Kerry McLaughlin via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make Waitcnt members private (PR #180772)   via llvm-commits
• [llvm] [openmp] [openmp][WebAssembly] add support for wasm64 (PR #181669)   via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Nikita Popov via llvm-commits
• [llvm] 19149a8 - [AArch64][llvm] Remove +pcdphint gating (#181633)   via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +pcdphint gating (PR #181633)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [NFC][SPIRV] Remove uses of `SPIRVType` in `SPIRVUtils` (PR #181663)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   via llvm-commits
• [llvm] [BlockFrequency] Add operator<< overload (PR #181703)   Nikita Popov via llvm-commits
• [llvm] [BlockFrequency] Add operator<< overload (PR #181703)   via llvm-commits
• [polly] [Polly][ScopInfo] Lazy Scop instantiation (PR #179535)   Karthika Devi C via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::removeMatchingExtensions` (PR #171809)   Ryotaro Kasuga via llvm-commits
• [llvm] d74617b - [DA] Remove `DependenceInfo::removeMatchingExtensions` (#171809)   via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Luisa Cicolini via llvm-commits
• [llvm] [TableGen] Use a new helper function for -register-info-debug. NFC. (PR #181704)   Jay Foad via llvm-commits
• [llvm] [TableGen] Use a new helper function for -register-info-debug. NFC. (PR #181704)   via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Sander de Smalen via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   via llvm-commits
• [lldb] [llvm] Add DW_LNAME_HIP (PR #180999)   via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] Add DW_LNAME_HIP (PR #180999)   Michael Buch via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [OpenMP] Make isPrivatizingClause version-sensitive (PR #181691)   Krzysztof Parzyszek via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [clang] [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   via llvm-commits
• [llvm] fd54aa9 - [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (#180418)   via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [OpenMP] Make isPrivatizingClause version-sensitive (PR #181691)   Tom Eccles via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [TableGen] Use a new helper function for -register-info-debug. NFC. (PR #181704)   Sam Elliott via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   via llvm-commits
• [llvm] f530c16 - [OpenMP] Make isPrivatizingClause version-sensitive (#181691)   via llvm-commits
• [llvm] [OpenMP] Make isPrivatizingClause version-sensitive (PR #181691)   Krzysztof Parzyszek via llvm-commits
• [llvm] [DSE] Consider all dominating conditions in `dominatingConditionImpliesValue` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Consider all dominating conditions in `dominatingConditionImpliesValue` (PR #181709)   via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +cmh gating (PR #181662)   Kerry McLaughlin via llvm-commits
• [llvm] [AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (PR #181671)   Shilei Tian via llvm-commits
• [lld] [NFC][ELF] Remove unused Config::hasTlsIe (PR #181680)   Fangrui Song via llvm-commits
• [llvm] [AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (PR #181671)   Shilei Tian via llvm-commits
• [llvm] Enable libc++ hardening mode for LLVM_ENABLE_ASSERTIONS (PR #130243)   Brian Cain via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Luisa Cicolini via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   Shilei Tian via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +cmh gating (PR #181662)   Jonathan Thackray via llvm-commits
• [llvm] Third Connex patch (#3) (PR #181711)   via llvm-commits
• [clang] [lld] [llvm] [WIP][IR][Constants] Change the semantic of `ConstantPointerNull` to represent an actual `nullptr` instead of a zero-value pointer (PR #166667)   Shilei Tian via llvm-commits
• [llvm] Third Connex patch (#3) (PR #181711)   via llvm-commits
• [clang] [lld] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)   Shilei Tian via llvm-commits
• [llvm] Third Connex patch (#3) (PR #181711)   via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [lld] e6e94a6 - [NFC][ELF] Remove unused Config::hasTlsIe (#181680)   via llvm-commits
• [lld] [NFC][ELF] Remove unused Config::hasTlsIe (PR #181680)   Jessica Clarke via llvm-commits
• [llvm] 21bc4aa - [TableGen] Use a new helper function for -register-info-debug. NFC. (#181704)   via llvm-commits
• [llvm] [TableGen] Use a new helper function for -register-info-debug. NFC. (PR #181704)   Jay Foad via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   via llvm-commits
• [llvm] a33db04 - Add DW_LNAME_HIP (#180999)   via llvm-commits
• [lldb] [llvm] Add DW_LNAME_HIP (PR #180999)   Michael Buch via llvm-commits
• [lldb] [llvm] Add DW_LNAME_HIP (PR #180999)   via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [TableGen] Simplify printing of simple InfoByHwModes (PR #181714)   Jay Foad via llvm-commits
• [llvm] [TableGen] Simplify printing of simple InfoByHwModes (PR #181714)   via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   Matt Arsenault via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Ulrich Weigand via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Ulrich Weigand via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Ulrich Weigand via llvm-commits
• [llvm] [InstCombine] Fix miscompilation for `select` + `FCmp` (PR #177872)   Tirthankar Mazumder via llvm-commits
• [llvm] [RFC][Attributor] change argument privatization to size-based type selection (PR #181716)   Jameson Nash via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Fangrui Song via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [RFC][Attributor] change argument privatization to size-based type selection (PR #181716)   via llvm-commits
• [llvm] [RFC][Attributor] change argument privatization to size-based type selection (PR #181716)   via llvm-commits
• [lld] d7f32c2 - [ELF,test] eh-frame-hdr-sdata8.s: use AT() to avoid huge PT_LOAD segments   Fangrui Song via llvm-commits
• [llvm] [CodeGen] Fix fixupKills incorrectly killing sub-registers via super-register implicit defs (PR #181518)   Brian Cain via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [llvm] [AMDGPU] Simplify cond branch if condition is known (PR #180081)   via llvm-commits
• [llvm] 3b73293 - Fix type mismatch in ARM calling convention ternary (#180872)   via llvm-commits
• [llvm] Fix type mismatch in ARM calling convention ternary (PR #180872)   Eric Christopher via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   David Green via llvm-commits
• [compiler-rt] [ASan] Enable __SANITIZER_DISABLE_CONTAINER_OVERFLOW__ tests (PR #181721)   Dan Blackwell via llvm-commits
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• [compiler-rt] [ASan] Enable __SANITIZER_DISABLE_CONTAINER_OVERFLOW__ tests (PR #181721)   Dan Blackwell via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Simplify cond branch if condition is known (PR #180081)   via llvm-commits
• [llvm] [IROutliner] Add TTI Hook for Propagating Attributes (PR #153985)   Eric Christopher via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   Stanislav Mekhanoshin via llvm-commits
• [llvm] e559d0a - [TableGen] Fix -Wunused-variable in non-assertion builds   Fangrui Song via llvm-commits
• [llvm] [RFC][Attributor] change argument privatization to size-based type selection (PR #181716)   via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Maksim Ivanov via llvm-commits
• [llvm] [mlir] [NCFI][OpenMPIRBuilderTest] remove some trivial uses of getAllocatedType (PR #181722)   Jameson Nash via llvm-commits
• [llvm] [mlir] [NCFI][OpenMPIRBuilderTest] remove some trivial uses of getAllocatedType (PR #181722)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Alexey Bataev via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Fangrui Song via llvm-commits
• [llvm] 7ec7907 - [SLP] Fix a very long loads offset, being stored in DenseMap   Alexey Bataev via llvm-commits
• [llvm] [bazel] fix #180640 (PR #181724)   Yi Zhang via llvm-commits
• [llvm] [TableGen] Simplify printing of simple InfoByHwModes (PR #181714)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (PR #181671)   Nikita Popov via llvm-commits
• [llvm] [bazel] fix #180640 (PR #181724)   Yi Zhang via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Osman Yasar via llvm-commits
• [llvm] [SPIRV] Stop using `createOpType` in `SPIRVGlobalRegistry::getOrCreateUndef` (PR #181726)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   via llvm-commits
• [llvm] [SPIRV] Stop using `createOpType` in `SPIRVGlobalRegistry::getOrCreateUndef` (PR #181726)   via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Osman Yasar via llvm-commits
• [libc] [llvm] [libc] Rewrite libc GPU code to use rpc::dispatch where possible (PR #181727)   Joseph Huber via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   via llvm-commits
• [llvm] [bazel] fix #180640 (PR #181724)   Yi Zhang via llvm-commits
• [libc] [llvm] [libc] Rewrite libc GPU code to use rpc::dispatch where possible (PR #181727)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   via llvm-commits
• [libc] [llvm] [libc] Rewrite libc GPU code to use rpc::dispatch where possible (PR #181727)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   via llvm-commits
• [llvm] [RegisterCoalescer] Fix compile-time blowup with partially-reserved physregs (PR #181728)   Brian Cain via llvm-commits
• [llvm] [RegisterCoalescer] Fix compile-time blowup with partially-reserved physregs (PR #181728)   via llvm-commits
• [llvm] 86f167b - AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (#180240)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use fpmath metadata on f16 log/log10 intrinsics (PR #180489)   Matt Arsenault via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Osman Yasar via llvm-commits
• [llvm] [bazel] fix #180640 (PR #181724)   Aiden Grossman via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Ryan Buchner via llvm-commits
• [llvm] [TableGen] Simplify printing of simple InfoByHwModes (PR #181714)   Sam Elliott via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #181597)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #181597)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #181597)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #181597)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [llvm] 792f405 - [NFC][SPIRV] Rework `isConstReg` to remove `SPIRVType` (#181647)   via llvm-commits
• [llvm] [NFC][SPIRV] Rework `isConstReg` to remove `SPIRVType` (PR #181647)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [bazel] fix #180640 (PR #181724)   Yi Zhang via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Nikita Popov via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [llvm] [openmp] [openmp][WebAssembly] add support for wasm64 (PR #181669)   via llvm-commits
• [llvm] [openmp] [openmp][WebAssembly] add support for wasm64 (PR #181669)   via llvm-commits
• [libc] [llvm] [openmp] [libc] Replace RPC 'close()' mechanism with RAII handler (PR #181690)   Johannes Doerfert via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Aiden Grossman via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   Abhina Sree via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   via llvm-commits
• [lldb] [llvm] [NFC] Ensure MCTargetOptions outlives MCAsmInfo at createMCAsmInfo call sites (PR #180465)   Aiden Grossman via llvm-commits
• [llvm] [CodeGen] Fix fixupKills incorrectly killing sub-registers via super-register implicit defs (PR #181518)   Brian Cain via llvm-commits
• [llvm] [CodeGen] Fix liveness tracking removing live sibling sub-registers (PR #181518)   Brian Cain via llvm-commits
• [llvm] [CodeGen] Fix liveness tracking removing live sibling sub-registers (PR #181518)   Brian Cain via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Fangrui Song via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Kyungtak Woo via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Fangrui Song via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Fangrui Song via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Aiden Grossman via llvm-commits
• [llvm] [OpenMP] Make isPrivatizingClause version-sensitive (PR #181691)   LLVM Continuous Integration via llvm-commits
• [lld] aec1c98 - [ELF] Add target-specific relocation scanning for SystemZ (#181563)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Fangrui Song via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Aiden Grossman via llvm-commits
• [llvm] [NFC][AArch64] Refactor AArch64ConditionOptimizer (PR #177521)   Hussam A. via llvm-commits
• [llvm] 7e653d0 - [TableGen] Simplify printing of simple InfoByHwModes (#181714)   via llvm-commits
• [llvm] [TableGen] Simplify printing of simple InfoByHwModes (PR #181714)   Jay Foad via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Ryan Buchner via llvm-commits
• [lld] [lld][MachO] Accept prefixed boundary symbol names (PR #181201)   Max T. Kristiansen via llvm-commits
• [llvm] [TableGen] Use standard name for default mode in debug printing (PR #181739)   Jay Foad via llvm-commits
• [llvm] [TableGen] Use standard name for default mode in debug printing (PR #181739)   via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   via llvm-commits
• [llvm] [llvm][clang] Revert split stacks implementation from runOnNewStack (PR #181743)   Michael Spencer via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Kevin Choi via llvm-commits
• [llvm] c4e8adf - [VPlan] Skip gather/scatters in useEmulatedMaskMemRefHack.   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math] Refactor float16 operations to header-only (PR #181745)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor float16 operations to header-only (PR #181745)   via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [libc] [llvm] [libc] Rewrite libc GPU code to use rpc::dispatch where possible (PR #181727)   Joseph Huber via llvm-commits
• [libc] [llvm] [openmp] [libc] Replace RPC 'close()' mechanism with RAII handler (PR #181690)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc] Support array tags in the RPC dispatch helpers (PR #181395)   Joseph Huber via llvm-commits
• [llvm] [CI][ScriptedBuilder] Avoid python 3.12-only option (PR #181746)   Michael Kruse via llvm-commits
• [llvm] [CI][ScriptedBuilder] Avoid python 3.12-only option (PR #181746)   Michael Kruse via llvm-commits
• [llvm] [CI][ScriptedBuilder] Avoid python 3.12-only option (PR #181746)   via llvm-commits
• [llvm] 4973c9b - [AArch64][llvm] Remove +cmh gating (#181662)   via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove +cmh gating (PR #181662)   Jonathan Thackray via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] 31438d5 - [NFC][TableGen] Use convertInitializerToInt in CodeGenRegister (#180968)   via llvm-commits
• [llvm] [NFC][TableGen] Use convertInitializerToInt in CodeGenRegister (PR #180968)   Rahul Joshi via llvm-commits
• [libc] [llvm] [libc][math] Refactor float16 operations to header-only (PR #181745)   via llvm-commits
• [llvm] [NFC][TableGen] Minor code cleanup in RegisterInfoEmitter (PR #181479)   Rahul Joshi via llvm-commits
• [llvm] eb85fc7 - [NFC][CodeGen] Minor code cleanup in MIR FrameIndex verification (#181551)   via llvm-commits
• [llvm] [NFC][CodeGen] Minor code cleanup in MIR FrameIndex verification (PR #181551)   Rahul Joshi via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] 227d8d3 - [llvm][clang] Revert split stacks implementation from runOnNewStack (#181743)   via llvm-commits
• [llvm] [llvm][clang] Revert split stacks implementation from runOnNewStack (PR #181743)   Michael Spencer via llvm-commits
• [llvm] [llvm][Support] Add YAMLGenerateSchema for producing YAML schemas (PR #133284)   Scott Linder via llvm-commits
• [llvm] [NFC][CodeGen] Add braces for else per LLVM coding standard (PR #181750)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Use standard name for default mode in debug printing (PR #181739)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Use standard name for default mode in debug printing (PR #181739)   Sam Elliott via llvm-commits
• [llvm] [NFC][TableGen] Minor code cleanup in RegisterInfoEmitter (PR #181479)   Sam Elliott via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] [CI][ScriptedBuilder] Avoid python 3.12-only option (PR #181746)   Michael Kruse via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [lld] ELF,SystemZ: Don't sort relocations for TLS GD/LD optimization; support CREL (PR #149640)   Fangrui Song via llvm-commits
• [lld] ELF,SystemZ: Don't sort relocations for TLS GD/LD optimization; support CREL (PR #149640)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for Hexagon (PR #181596)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for Hexagon (PR #181596)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for Hexagon (PR #181596)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   Joseph Huber via llvm-commits
• [llvm] 2ff4ec1 - [SLP]Fix revec in split nodes   Alexey Bataev via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [llvm] 7679d02 - [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (#181356)   via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   Martin Storsjö via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   Joseph Huber via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   Joseph Huber via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   Joseph Huber via llvm-commits
• [lld] 6d91695 - [ELF] Add target-specific relocation scanning for Hexagon (#181596)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for Hexagon (PR #181596)   Fangrui Song via llvm-commits
• [polly] [Polly][ScopInfo] Lazy Scop instantiation (PR #179535)   Michael Kruse via llvm-commits
• [clang] [llvm] [CIR] Upstream support for setjmp & longjmp builtins (PR #178989)   Ayokunle Amodu via llvm-commits
• [polly] [Polly][ScopInfo] Lazy Scop instantiation (PR #179535)   Michael Kruse via llvm-commits
• [polly] d5607ad - [Polly][ScopInfo] Lazy Scop instantiation (#179535)   via llvm-commits
• [polly] [Polly][ScopInfo] Lazy Scop instantiation (PR #179535)   Michael Kruse via llvm-commits
• [clang] [llvm] [CIR] Upstream support for setjmp & longjmp builtins (PR #178989)   Ayokunle Amodu via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Min-Yih Hsu via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   via llvm-commits
• [llvm] [SafeStack] Use ptrmask instead of ptrtoint+and+inttoptr (PR #181649)   Alexander Richardson via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Min-Yih Hsu via llvm-commits
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• [llvm] [AArch64][GlobalISel] Reassociate add sub mul. (PR #180753)   David Green via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for Hexagon (PR #181596)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   Min-Yih Hsu via llvm-commits
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• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
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• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   Aiden Grossman via llvm-commits
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• [llvm] [SafeStack] Use ptrmask instead of ptrtoint+and+inttoptr (PR #181649)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Fix crash in __asan_region_is_poisoned at application memory boundaries (PR #180223)   Roman Vinogradov via llvm-commits
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• [llvm] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Eric Feng via llvm-commits
• [llvm] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   via llvm-commits
• [llvm] [AArch64] optimize manual addp (PR #181549)   Folkert de Vries via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move soft xcnt deletion to separate function (PR #181760)   via llvm-commits
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• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Pranav Bhandarkar via llvm-commits
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• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   Joseph Huber via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   Joseph Huber via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   Joseph Huber via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   Joseph Huber via llvm-commits
• [llvm] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Eric Feng via llvm-commits
• [llvm] Revert "[MC/DC] Make covmap tolerant of nested Decisions (#125407)" (PR #181069)   NAKAMURA Takumi via llvm-commits
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• [clang] [llvm] [CIR] Upstream support for setjmp & longjmp builtins (PR #178989)   Ayokunle Amodu via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [llvm] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Jakub Kuderski via llvm-commits
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• [llvm] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Benjamin Kramer via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [llvm] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Jakub Kuderski via llvm-commits
• [llvm] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Jakub Kuderski via llvm-commits
• [llvm] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Jakub Kuderski via llvm-commits
• [llvm] 051fb5a - [ADT] Remove misleading is_const check in MutableArrayRef constructor (#181758)   via llvm-commits
• [llvm] [ADT] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   Jakub Kuderski via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
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• [clang] [llvm] [CIR] Upstream support for setjmp & longjmp builtins (PR #178989)   Ayokunle Amodu via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
• [llvm] [CI Testing/Do not review] Test PR for automerge (PR #181762)   Aiden Grossman via llvm-commits
• [llvm] [LLVM][Utils] Fix automerge in git-llvm-push (PR #181766)   Aiden Grossman via llvm-commits
• [clang] [llvm] [CIR] Upstream support for setjmp & longjmp builtins (PR #178989)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR] Upstream support for setjmp & longjmp builtins (PR #178989)   Ayokunle Amodu via llvm-commits
• [llvm] 0667781 - [gn] port a591a44653ea   Nico Weber via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] 942f5fb - [gn] port 4a4ab28f94bdc7   Nico Weber via llvm-commits
• [clang] [libc] [llvm] [libc] Add basic support for building SPIR-V libraries (PR #181049)   Joseph Huber via llvm-commits
• [llvm] ab3d742 - [libc] Add basic support for building SPIR-V libraries (#181049)   via llvm-commits
• [clang] [libc] [llvm] [libc] Add basic support for building SPIR-V libraries (PR #181049)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] 0065a55 - [gn] port some of 6b75eaea794f6   Nico Weber via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Brian Cain via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   via llvm-commits
• [llvm] [RegisterCoalescer] Fix compile-time blowup with partially-reserved physregs (PR #181728)   Brian Cain via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move soft xcnt deletion to separate function (PR #181760)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move soft xcnt deletion to separate function (PR #181760)   Christudasan Devadasan via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   Phoebe Wang via llvm-commits
• [llvm] [ADT] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   LLVM Continuous Integration via llvm-commits
• [llvm] 7806a0b - [CodeGen] Silence a warning (NFC)   Jie Fu via llvm-commits
• [llvm] [RegisterCoalescer] Fix compile-time blowup with partially-reserved physregs (PR #181728)   Nathan Chancellor via llvm-commits
• [llvm] [ADT] Remove misleading is_const check in MutableArrayRef constructor (PR #181758)   LLVM Continuous Integration via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Carl Ritson via llvm-commits
• [libc] [llvm] [libc] Support array tags in the RPC dispatch helpers (PR #181395)   Shilei Tian via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [libc] [llvm] [libc] Support array tags in the RPC dispatch helpers (PR #181395)   Joseph Huber via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Phoebe Wang via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Phoebe Wang via llvm-commits
• [clang] [libc] [llvm] [libc] Add basic support for building SPIR-V libraries (PR #181049)   LLVM Continuous Integration via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Rohit Aggarwal via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move soft xcnt deletion to separate function (PR #181760)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move soft xcnt deletion to separate function (PR #181760)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move soft xcnt deletion to separate function (PR #181760)   via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move soft xcnt deletion to separate function (PR #181760)   via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   via llvm-commits
• [llvm] [VPlan] Run narrowInterleaveGroups during general VPlan optimizations. (PR #149706)   Shunsuke Watanabe via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   Tim Gymnich via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (PR #181671)   Tim Gymnich via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [NFC][CodeGen] Use std::move to avoid copy (PR #181623)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [RISCV] Add test cases showing RegisterScavenger crash (PR #181537)   via llvm-commits
• [flang] [llvm] [flang][cuda] Lower set/get default stream (PR #181775)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][cuda] Lower set/get default stream (PR #181775)   via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit to optimize bswap64 builtin for power8 (PR #181776)   via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit to optimize bswap64 builtin for power8 (PR #181776)   via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit to optimize bswap64 builtin for power8 (PR #181776)   via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit to optimize bswap64 builtin for power8 (PR #181776)   via llvm-commits
• [llvm] [RegisterCoalescer] Fix compile-time blowup with partially-reserved physregs (PR #181728)   Brian Cain via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Kareem Ergawy via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Luke Lau via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] [WebAssembly] Add more tests for `wasm-fix-irreducible-control-flow`. NFC (PR #181254)   Demetrius Kanios via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] Support vector `ptrtoint` and `inttoptr` with X86 GlobalISel. (PR #175270)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Kareem Ergawy via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Luke Lau via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Luke Lau via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Luke Lau via llvm-commits
• [llvm] fb41009 - [RISCV] Add test cases showing RegisterScavenger crash (#181537)   via llvm-commits
• [llvm] [RISCV] Add test cases showing RegisterScavenger crash (PR #181537)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add test cases showing RegisterScavenger crash (PR #181537)   via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit to optimize bswap64 builtin for power8 (PR #181776)   Tony Varghese via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   Atharv Mane via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [AMDGPU] Tune 8-pass MFMA resource usage (PR #181778)   via llvm-commits
• [llvm] [AMDGPU] Tune 8-pass MFMA resource usage (PR #181778)   via llvm-commits
• [compiler-rt] [tsan] Only init AdaptiveDelay if enabled (PR #181757)   Dmitry Vyukov via llvm-commits
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• [compiler-rt] [tsan] Only init AdaptiveDelay if enabled (PR #181757)   Dmitry Vyukov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   Atharv Mane via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   via llvm-commits
• [llvm] Add const check (PR #181190)   kadir çetinkaya via llvm-commits
• [libc] [llvm] [libc][math] Refactor float16 operations to header-only (PR #181745)   via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Chandana Mudda via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Chandana Mudda via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [tsan] Only init AdaptiveDelay if enabled (PR #181757)   LLVM Continuous Integration via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
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• [llvm] c985f28 - [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (#181359)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Kareem Ergawy via llvm-commits
• [llvm] [InstCombine] Remove uses of arguments to assumes (PR #177879)   Nikolas Klauser via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikolas Klauser via llvm-commits
• [llvm] [GlobalISel] Add G_UDIV/G_SDIV computeKnownBits (PR #181307)   Alex Wang via llvm-commits
• [llvm] [GISel][X86] Port CSE analysis to NPM (PR #179815)   Gergo Stomfai via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 2b4a462 - [AMDGPU] Add missing comma between export target and first export data (#181641)   via llvm-commits
• [llvm] [AMDGPU] Add missing comma between export target and first export data (PR #181641)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 89eb732 - [AMDGPU] Add VDSDIR encoding to gfx13 (#181620)   via llvm-commits
• [llvm] [AMDGPU] Add VDSDIR encoding to gfx13 (PR #181620)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 6f0759d - [SafeStack] Use ptrmask instead of ptrtoint+and+inttoptr (#181649)   via llvm-commits
• [llvm] [SafeStack] Use ptrmask instead of ptrtoint+and+inttoptr (PR #181649)   Nikita Popov via llvm-commits
• [llvm] 5933294 - [AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (#181671)   via llvm-commits
• [llvm] [AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (PR #181671)   Nikita Popov via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #174590 (PR #181785)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #174590 (PR #181785)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #174590 (PR #181785)   Sohaib Iftikhar via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Kareem Ergawy via llvm-commits
• [llvm] [SPIRV] Emit intrinsics for globals only in function that references them (PR #178143)   Konrad Kleine via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #174590 (2) (PR #181786)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #174590 (2) (PR #181786)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #174590 (2) (PR #181786)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #174590 (2) (PR #181786)   Sohaib Iftikhar via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Pekka Jääskeläinen via llvm-commits
• [llvm] d72bc09 - AMDGPU: Use fpmath metadata on f16 log/log10 intrinsics (#180489)   via llvm-commits
• [llvm] AMDGPU: Use fpmath metadata on f16 log/log10 intrinsics (PR #180489)   Matt Arsenault via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Pekka Jääskeläinen via llvm-commits
• [llvm] [AMDGPU] Add VEXPORT encoding for gfx13 (PR #181788)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VEXPORT encoding for gfx13 (PR #181788)   via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #174590 (2) (PR #181786)   Sohaib Iftikhar via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [llvm-objdump] Return non-zero exit code for invalid MachO files (PR #172886)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Return non-zero exit code for invalid MachO files (PR #172886)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Return non-zero exit code for invalid MachO files (PR #172886)   James Henderson via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   David Sherwood via llvm-commits
• [llvm] [VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (PR #181789)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (PR #181789)   via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Simon Pilgrim via llvm-commits
• [llvm] 48a1652 - [AArch64] optimize manual addp (#181549)   via llvm-commits
• [llvm] [AArch64] optimize manual addp (PR #181549)   Folkert de Vries via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Ryan Cowan via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [clang] [llvm] [OpenMP][Offload] Fix base pointer handling for strided target update in structs with pointer members (PR #176914)   Amit Tiwari via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   Paschalis Mpeis via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] d2d620d - [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (#181156)   via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   Simon Tatham via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Ulrich Weigand via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Cullen Rhodes via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   Folkert de Vries via llvm-commits
• [llvm] [ARM] support `r14` as an alias for `lr` in inline assembly (PR #179740)   Simon Tatham via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   LLVM Continuous Integration via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld (PR #181793)   via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   David Sherwood via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Simon Pilgrim via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld (PR #181793)   Jan Patrick Lehr via llvm-commits
• [llvm] [NFC][SPIRV] Remove `SPIRVType` from comments (PR #181652)   Manuel Carrasco via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Simon Pilgrim via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Sander de Smalen via llvm-commits
• [llvm] [SLP]Do not increase depth for type-changing nodes and NotProfitableForVectorization removal (PR #180950)   Simon Pilgrim via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [TargetLowering][RISCV] Disable the special illegal type expansion of ISD::AVGFLOORU on RV32 (PR #181073)   Simon Pilgrim via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Rohit Aggarwal via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Ryan Cowan via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld and llvm-symbolizer (PR #181793)   Michael Kruse via llvm-commits
• [llvm] Support vector `ptrtoint` and `inttoptr` with X86 GlobalISel. (PR #175270)   Simon Pilgrim via llvm-commits
• [llvm] Support vector `ptrtoint` and `inttoptr` with X86 GlobalISel. (PR #175270)   Simon Pilgrim via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld and llvm-symbolizer (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Pekka Jääskeläinen via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Pekka Jääskeläinen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Graham Hunter via llvm-commits
• [llvm] [AMDGPU] Simplify cond branch if condition is known (PR #180081)   Jay Foad via llvm-commits
• [llvm] 1b0cbdb - [TableGen] Use standard name for default mode in debug printing (#181739)   via llvm-commits
• [llvm] [TableGen] Use standard name for default mode in debug printing (PR #181739)   Jay Foad via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Benjamin Maxwell via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   Graham Hunter via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Benjamin Maxwell via llvm-commits
• [llvm] a6b7f42 - [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (#180773)   via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   David Sherwood via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   via llvm-commits
• [llvm] [LoopVectorize][LAA] Hoist load in memory IV to allow vectorization (PR #168312)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize][LAA] Hoist load in memory IV to allow vectorization (PR #168312)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize][LAA] Hoist load in memory IV to allow vectorization (PR #168312)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize][LAA] Hoist load in memory IV to allow vectorization (PR #168312)   Florian Hahn via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Nikita Popov via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Jay Foad via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Jay Foad via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Jay Foad via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Florian Hahn via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   via llvm-commits
• [llvm] [VPlan] Simplify worklist in reassociateHeaderMask. NFC (PR #181595)   Florian Hahn via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
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• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
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• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
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• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Lucas Ramirez via llvm-commits
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• [llvm] c15f71d - [NFC][SPIRV] Remove `SPIRVType` from comments (#181652)   via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
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• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #181802)   via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #181802)   via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Lucas Ramirez via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Owen Anderson via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Fedor Nikolaev via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Fedor Nikolaev via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Fedor Nikolaev via llvm-commits
• [llvm] 2b90b63 - [LLVM][CodeGen] Add suppport for vector ConstantInt/FP to scalarConstantToHexString. (#180978)   via llvm-commits
• [llvm] [LLVM][CodeGen] Add suppport for vector ConstantInt/FP to scalarConstantToHexString. (PR #180978)   Paul Walker via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Ryan Cowan via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Enable custom lowering of 256/512-bit vXi32 and vXi64 CLMUL nodes (PR #177554)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Ryan Cowan via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [LoopInterchange] Update tests generated by UTC (NFC) (PR #181804)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update tests generated by UTC (NFC) (PR #181804)   via llvm-commits
• [llvm] [AMDGPU] Add VEXPORT encoding for gfx13 (PR #181788)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add VEXPORT encoding for gfx13 (PR #181788)   Jay Foad via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Graham Hunter via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Graham Hunter via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Graham Hunter via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [lld] [lld][Webassembly] Avoid a signed overflow on large sections (PR #178287)   Omair Javaid via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [lld] Revert "[lld][Webassembly] Avoid a signed overflow on large sections … (PR #181807)   Omair Javaid via llvm-commits
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• [llvm] [X86] Enable custom lowering of 256/512-bit vXi32 and vXi64 CLMUL nodes (PR #177554)   Simon Pilgrim via llvm-commits
• [lld] Revert "[lld][Webassembly] Avoid a signed overflow on large sections … (PR #181807)   Omair Javaid via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] Enable custom lowering of 256/512-bit vXi32 and vXi64 CLMUL nodes (PR #177554)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Canonicalize compare of abd? (PR #180952)   via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [LoopInterchange] Update tests generated by UTC (NFC) (PR #181804)   via llvm-commits
• [llvm] [LoopInterchange] Update tests generated by UTC (NFC) (PR #181804)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] Enable custom lowering of 256/512-bit vXi32 and vXi64 CLMUL nodes (PR #177554)   Folkert de Vries via llvm-commits
• [llvm] 2b4da2e - [LV] Update predicator.ll test checks.   Florian Hahn via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode: add X86ISD::BZHI handling (PR #177881)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Florian Hahn via llvm-commits
• [llvm] [Tablegen] Fix condition to report when lanemask overflows (PR #181810)   Petr Vesely via llvm-commits
• [llvm] [Tablegen] Fix condition to report when lanemask overflows (PR #181810)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   John Brawn via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [X86][GlobalISel] Support globals in pic mode (PR #170038)   Evgenii Kudriashov via llvm-commits
• [llvm] [SPIRV] Fix `SPIRVTypeInst` `DenseMapInfo` implementation (PR #181667)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Michael Kruse via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode: add X86ISD::BZHI handling (PR #177881)   Saina Daneshmand via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld and llvm-symbolizer (PR #181793)   Joseph Huber via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode: add X86ISD::BZHI handling (PR #177881)   Saina Daneshmand via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Graham Hunter via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [LoopInterchange] Update tests generated by UTC (NFC) (PR #181804)   Michael Kruse via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld and llvm-symbolizer (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld and llvm-symbolizer (PR #181793)   Michael Kruse via llvm-commits
• [llvm] 900778e - [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to ISD::SELECT/VSELECT cases (#181753)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   Simon Pilgrim via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld and llvm-symbolizer (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to … (PR #181753)   via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld and llvm-symbolizer (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [VPlan] Support plain CFG plans in the verifier. (PR #181817)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support plain CFG plans in the verifier. (PR #181817)   via llvm-commits
• [llvm] [Offload][test] Use just-compiled lld and llvm-symbolizer (PR #181793)   Michael Kruse via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Florian Hahn via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Michael Kruse via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Michael Kruse via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Michael Kruse via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] Support vector `ptrtoint` and `inttoptr` with X86 GlobalISel. (PR #175270)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [DSE] Consider all dominating conditions in `dominatingConditionImpliesValue` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update tests generated by UTC (NFC) (PR #181804)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update tests generated by UTC (NFC) (PR #181804)   Ryotaro Kasuga via llvm-commits
• [llvm] Support vector `ptrtoint` and `inttoptr` with X86 GlobalISel. (PR #175270)   via llvm-commits
• [llvm] [SDAG] Canonicalize compare of abd (PR #180952)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] foldSelectToABD - canonicalize compare of abd (PR #180952)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] foldSelectToABD - canonicalize compare of abd (PR #180952)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] [SLP] semanticly-same.ll - regenerate tests to reduce diff in #181731 (PR #181819)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] semanticly-same.ll - regenerate tests to reduce diff in #181731 (PR #181819)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
• [llvm] [DSE] Consider all dominating conditions in `dominatingConditionImpliesValue` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)   Cheng Lingfei via llvm-commits
• [llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   David Sherwood via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   David Sherwood via llvm-commits
• [llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)   Cheng Lingfei via llvm-commits
• [llvm] Add const check (PR #181190)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   David Green via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update tests generated by UTC (NFC) (PR #181804)   Ryotaro Kasuga via llvm-commits
• [llvm] 19dbbee - [LoopInterchange] Update tests generated by UTC (NFC) (#181804)   via llvm-commits
• [llvm] [BlockFrequency] Add operator<< overload (PR #181703)   Aiden Grossman via llvm-commits
• [llvm] [SLP] semanticly-same.ll - regenerate tests to reduce diff in #181731 (PR #181819)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   David Green via llvm-commits
• [llvm] 9a0861e - [SLP] semanticly-same.ll - regenerate tests to reduce diff in #181731 (#181819)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [VPlan] Run narrowInterleaveGroups during general VPlan optimizations. (PR #149706)   Sohaib Iftikhar via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [libc] [llvm] [libc][math] Refactor payload_functions family to header-only (PR #181824)   via llvm-commits
• [llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)   Cheng Lingfei via llvm-commits
• [libc] [llvm] [libc][math] Refactor payload_functions family to header-only (PR #181824)   via llvm-commits
• [llvm] Remove reference to catapult's github repository (PR #181368)   Victor Vianna via llvm-commits
• [llvm] [VPlan] Run narrowInterleaveGroups during general VPlan optimizations. (PR #149706)   Florian Hahn via llvm-commits
• [llvm] 75aa83c - [SDAG] foldSelectToABD - canonicalize compare of abd (#180952)   via llvm-commits
• [llvm] [SDAG] foldSelectToABD - canonicalize compare of abd (PR #180952)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Simplify worklist in reassociateHeaderMask. NFC (PR #181595)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify worklist in reassociateHeaderMask. NFC (PR #181595)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify worklist in reassociateHeaderMask. NFC (PR #181595)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify worklist in reassociateHeaderMask. NFC (PR #181595)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify worklist in reassociateHeaderMask. NFC (PR #181595)   Luke Lau via llvm-commits
• [llvm] [VPlan] Run narrowInterleaveGroups during general VPlan optimizations. (PR #149706)   Sohaib Iftikhar via llvm-commits
• [llvm] [WIP][SPARC] Add TTI implementation for getting register numbers and widths (PR #180660)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Support plain CFG plans in the verifier. (PR #181817)   Luke Lau via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getting register numbers and widths (PR #180660)   via llvm-commits
• [llvm] [SPARC][IAS] Add lzd alias for lzcnt (PR #179487)   via llvm-commits
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• [llvm] [X86] combine-clmul.ll - pull out canonicalization tests from #177566 (PR #181820)   Simon Pilgrim via llvm-commits
• [llvm] 4f92cf9 - [X86] combine-clmul.ll - pull out canonicalization tests from #177566 (#181820)   via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Florian Hahn via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Simon Pilgrim via llvm-commits
• [llvm] [DeadStoreElimination] Handle dominating conditions established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [llvm] [Inliner] Disable locally hot callsite heuristic for inlined calls (PR #181827)   Nikita Popov via llvm-commits
• [llvm] [DSE] Add variant of conditions implying value established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [DSE] Add variant of conditions implying value established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [DSE] Add variant of conditions implying value established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [RegisterCoalescer] Fix compile-time blowup with partially-reserved physregs (PR #181728)   Brian Cain via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [Offload][CI] Enable OpenMP/Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [llvm-objdump] Return non-zero exit code for invalid MachO files (PR #172886)   Ryan Mansfield via llvm-commits
• [llvm] [SPIRV] Fix `SPIRVTypeInst` `DenseMapInfo` implementation (PR #181667)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [llvm-objdump] Return non-zero exit code for invalid MachO files (PR #172886)   Ryan Mansfield via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [HIPSPV] Add chipStar SPIR-V support for the new offload driver (PR #180903)   Henry Linjamäki via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [SLP]Do not increase depth for type-changing nodes and NotProfitableForVectorization removal (PR #180950)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Florian Hahn via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Gaëtan Bossu via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Simon Pilgrim via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   via llvm-commits
• [llvm] ef52df4 - [SLP]Do not increase depth for type-changing nodes and NotProfitableForVectorization removal   via llvm-commits
• [llvm] [SLP]Do not increase depth for type-changing nodes and NotProfitableForVectorization removal (PR #180950)   Alexey Bataev via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Nick Sarnie via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Nick Sarnie via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Javier Lopez-Gomez via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Nick Sarnie via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Joseph Huber via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Alexey Bataev via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Sander de Smalen via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Joseph Huber via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Alexey Bataev via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [NFC][CodeGen] Use std::move to avoid copy (PR #181623)   via llvm-commits
• [llvm] [NFC][CodeGen] Use std::move to avoid copy (PR #181623)   via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #181391 (PR #181833)   Sohaib Iftikhar via llvm-commits
• [llvm] 34c535b - [NFC][TableGen] Minor code cleanup in RegisterInfoEmitter (#181479)   via llvm-commits
• [llvm] [NFC][TableGen] Minor code cleanup in RegisterInfoEmitter (PR #181479)   Rahul Joshi via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Ryan Cowan via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #181391 (PR #181833)   Sohaib Iftikhar via llvm-commits
• [llvm] [NFC][CodeGen] Add braces for else per LLVM coding standard (PR #181750)   Rahul Joshi via llvm-commits
• [llvm] [AArch64] Refactor SVE reduction lowering logic (NFCI) (PR #181834)   Benjamin Maxwell via llvm-commits
• [llvm] [MLIR|BUILD] Fix for #181391 (PR #181833)   Sohaib Iftikhar via llvm-commits
• [llvm] [AArch64] Refactor SVE reduction lowering logic (NFCI) (PR #181834)   via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [llvm] [llvm-objdump] Return non-zero exit code for invalid MachO files (PR #172886)   James Henderson via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Nick Sarnie via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Joseph Huber via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Joseph Huber via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Joseph Huber via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Joseph Huber via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Joseph Huber via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Joseph Huber via llvm-commits
• [llvm] Reapply x2 "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #181429)   Nick Sarnie via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [libc] [llvm] [libc][math][c23] Implement higher math function `cbrtf16` in LLVM libc (PR #132484)   via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   via llvm-commits
• [llvm] [Inline] Accumulate the cost of the inlined function to the new call site (PR #111104)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math][c23] Implement higher math function `cbrtf16` in LLVM libc (PR #132484)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   Shilei Tian via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)   Florian Hahn via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   Shilei Tian via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   Shilei Tian via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   Shilei Tian via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   Shilei Tian via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   Ryan Mitchell via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Alexey Bataev via llvm-commits
• [llvm] [X86] combine widening `shl` + adjacent addition into `VPMADDWD` (PR #179326)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jameson Nash via llvm-commits
• [clang] [llvm] [OMPIRBuilder] Replace getAllocatedType with careful tracking (PR #181845)   Jameson Nash via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   via llvm-commits
• [clang] [llvm] [OMPIRBuilder] Replace getAllocatedType with careful tracking (PR #181845)   via llvm-commits
• [clang] [llvm] [OMPIRBuilder] Replace getAllocatedType with careful tracking (PR #181845)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] 304d763 - [AArch64][GlobalISel] Split arm64-indexed-memory.ll into arm64_32-indexed-memory.ll and extend tests. NFC   David Green via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [llvm] [mailmap] Map quicinc.com addresses to qti.qualcomm.com/oss.qualcomm.com; fix sort order (PR #181426)   Fateme Hosseini via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Shilei Tian via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Shilei Tian via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Shilei Tian via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)   Andrei Elovikov via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Simon Pilgrim via llvm-commits
• [llvm] c342388 - [X86] combine widening `shl` + adjacent addition into `VPMADDWD` (#179326)   via llvm-commits
• [llvm] [X86] combine widening `shl` + adjacent addition into `VPMADDWD` (PR #179326)   Folkert de Vries via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [AArch64] Enable MaxInterleaveFactor4 for cortex-x series CPUs. (PR #181851)   David Green via llvm-commits
• [llvm] [AArch64] Enable MaxInterleaveFactor4 for cortex-x series CPUs. (PR #181851)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [GitHub] Add gh-pr-diff to facilitate using 'git diff' for PRs (PR #181852)   Joel E. Denny via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [bazel] Modify mlir/BUILD.bazel for #181391 (PR #181839)   via llvm-commits
• [llvm] aab9412 - [VPlan] Strengthen materializeFactors with assert (NFC) (#181665)   via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Benjamin Maxwell via llvm-commits
• [llvm] [bazel] Modify mlir/BUILD.bazel for #181391 (PR #181839)   via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [green dragon] limit relay jobs to prevent concurrent builds (PR #181854)   Justice Adams via llvm-commits
• [llvm] [NFC][CodeGen] Add braces for else per LLVM coding standard (PR #181750)   Yanzuo Liu via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, X, Y) | (shl X, Y) --> fshl (A|X), X, Y (PR #180887)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Make LoadExtActions address-space aware (PR #162407)   Simon Pilgrim via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Tom Eccles via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [NFC][CodeGen] Add braces for else per LLVM coding standard (PR #181750)   Sam Elliott via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [SDAG] Use the precise isTruncFree overload more often (PR #176575)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang][ssaf] Fix UB caused by missing virtual dtor of FormatInfoEntry (PR #181838)   Aviral Goel via llvm-commits
• [llvm] [SDAG] Use the precise isTruncFree overload more often (PR #176575)   Simon Pilgrim via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Paul Kirth via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Paul Kirth via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Paul Kirth via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Yingwei Zheng via llvm-commits
• [llvm] [CodeGen] Make LoadExtActions address-space aware (PR #162407)   Demetrius Kanios via llvm-commits
• [llvm] 03ad654 - [DAGCombiner] Combine (fshl A, X, Y) | (shl X, Y) --> fshl (A|X), X, Y (#180887)   via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, X, Y) | (shl X, Y) --> fshl (A|X), X, Y (PR #180887)   Craig Topper via llvm-commits
• [llvm] [VPlan] Remove VPDerivedIVRecipe and VPScalarIVStepsRecipe from VPHeaderPHIRecipe doc comment. NFC (PR #181862)   Luke Lau via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Brad Smith via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   Simon Pilgrim via llvm-commits
• [flang] [llvm] [flang][cuda] Lower set/get default stream (PR #181775)   Zhen Wang via llvm-commits
• [llvm] [VPlan] Remove VPDerivedIVRecipe and VPScalarIVStepsRecipe from VPHeaderPHIRecipe doc comment. NFC (PR #181862)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Antonio Frighetto via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [CodeGen] Make LoadExtActions address-space aware (PR #162407)   Simon Pilgrim via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Tom Eccles via llvm-commits
• [lld] d3e683c - [ELF][SystemZ] Fix R_390_TLS_LDO32/64 in non-SHF_ALLOC sections   Jessica Clarke via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for SystemZ (PR #181563)   Jessica Clarke via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Tatham via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Tatham via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Tatham via llvm-commits
• [lld] [lld][Webassembly] Avoid a signed overflow on large sections (PR #178287)   Fatih BAKIR via llvm-commits
• [llvm] Reapply [X86][ARM] Invert the low bit to get the inverse predicate (NFC) (PR #152053)   Simon Pilgrim via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Luke Lau via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Demetrius Kanios via llvm-commits
• [lld] [RFC][lld][SPIRV] Add support for SPIR-V LTO (PR #178749)   Joseph Huber via llvm-commits
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• [lld] [RFC][lld][SPIRV] Add support for SPIR-V LTO (PR #178749)   Joseph Huber via llvm-commits
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• [lld] [RFC][lld][SPIRV] Add support for SPIR-V LTO (PR #178749)   Joseph Huber via llvm-commits
• [lld] [RFC][lld][SPIRV] Add support for SPIR-V LTO (PR #178749)   Joseph Huber via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Demetrius Kanios via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [flang] [llvm] [flang][cuda] Lower set/get default stream (PR #181775)   Valentin Clement バレンタイン クレメン via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Aiden Grossman via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Demetrius Kanios via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] [GitHub] Add gh-pr-diff to facilitate using 'git diff' for PRs (PR #181852)   Aiden Grossman via llvm-commits
• [lld] [lld][WebAssembly] clang-format lld/wasm files. NFC (PR #181871)   Sam Clegg via llvm-commits
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• [lld] [lld][WebAssembly] clang-format lld/wasm files. NFC (PR #181871)   via llvm-commits
• [lld] [lld][WebAssembly] clang-format lld/wasm files. NFC (PR #181871)   Sam Clegg via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [Offload] Add argument to 'olInit' for global configuration options (PR #181872)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add argument to 'olInit' for global configuration options (PR #181872)   via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [X86] combineSetCC - pull out repeated getTargetLoweringInfo calls. NFC. (PR #181873)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [NFC][CodeGen] Add braces for else per LLVM coding standard (PR #181750)   Rahul Joshi via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] 1d57656 - [NFC][CodeGen] Add braces for else per LLVM coding standard (#181750)   via llvm-commits
• [llvm] [NFC][CodeGen] Add braces for else per LLVM coding standard (PR #181750)   Rahul Joshi via llvm-commits
• [llvm] 26f944b - [SLP]Fix an ArrayRef out-of-bounds access in slice   Alexey Bataev via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   Akash Dutta via llvm-commits
• [llvm] [VPlan] Support plain CFG plans in the verifier. (PR #181817)   Luke Lau via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [lld] [llvm] [WebAssembly] Use generic CPU by default in llvm-mc (PR #181460)   Petr Penzin via llvm-commits
• [llvm] [GitHub] Add gh-pr-diff to facilitate using 'git diff' for PRs (PR #181852)   Joel E. Denny via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Tom Eccles via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] 46ed620 - [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (#179693)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   Akash Dutta via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (PR #181877)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (PR #181877)   via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (PR #181877)   via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Fix liveness tracking removing live sibling sub-registers (PR #181518)   Brian Cain via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [MIR][MachineInstr] Update MachineInstr::eraseFromParent() to return an iterator (PR #179787)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Alexey Bataev via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] a5aaa9d - [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen   via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OMPIRBuilder] Replace getAllocatedType with careful tracking (PR #181845)   Tom Eccles via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [X86] Eliminate redundant zero-extension instructions (PR #161401)   Simon Pilgrim via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Petr Penzin via llvm-commits
• [llvm] [X86] Stop emitting CFI instructions on i386-windows (PR #135648)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [gsymutil] Verify output string table size and address info offsets do not exceed 32-bit max (PR #181458)   Greg Clayton via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass (PR #165018)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Minsoo Choo via llvm-commits
• [llvm] [mlir] [NCFI][OpenMPIRBuilderTest] remove some trivial uses of getAllocatedType (PR #181722)   Tom Eccles via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [clang] [llvm] [CIR] Upstream support for setjmp & longjmp builtins (PR #178989)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR] Upstream support for setjmp & longjmp builtins (PR #178989)   Andy Kaylor via llvm-commits
• [llvm] [X86] Add (_BitInt(128) & (1 << BitNo)) != 0 test coverage from #147216 (PR #181880)   Simon Pilgrim via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Shivam Kunwar via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Ryan Buchner via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [X86][ProfCheck] Synthesize profile information where relevant (PR #181578)   Aiden Grossman via llvm-commits
• [llvm] [X86][ProfCheck] Synthesize profile information where relevant (PR #181578)   Aiden Grossman via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [green dragon] add bisection job (PR #181883)   Justice Adams via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (PR #181877)   via llvm-commits
• [llvm] [green dragon] add bisection job (PR #181883)   via llvm-commits
• [llvm] 1ce4d94 - [X86] combineSetCC - pull out repeated getTargetLoweringInfo calls. NFC. (#181873)   via llvm-commits
• [llvm] [X86] combineSetCC - pull out repeated getTargetLoweringInfo calls. NFC. (PR #181873)   Simon Pilgrim via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [NCFI][OpenMPIRBuilderTest] remove some trivial uses of getAllocatedType (PR #181722)   Jameson Nash via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] 4581b08 - [gsymutil] Verify output string table size and address info offsets do not exceed 32-bit max (#181458)   via llvm-commits
• [llvm] [gsymutil] Verify output string table size and address info offsets do not exceed 32-bit max (PR #181458)   Roy Shi via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add (_BitInt(128) & (1 << BitNo)) != 0 test coverage from #147216 (PR #181880)   Simon Pilgrim via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [llvm] [NVPTX][Inliner] Increase inlining threshold multiplier from 11 to 29 (PR #180015)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX][Inliner] Increase inlining threshold multiplier from 11 to 29 (PR #180015)   Justin Fargnoli via llvm-commits
• [lld] [lld][WebAssembly] clang-format lld/wasm files. NFC (PR #181871)   Heejin Ahn via llvm-commits
• [lld] [lld][WebAssembly] clang-format lld/wasm files. NFC (PR #181871)   Heejin Ahn via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   Lei Huang via llvm-commits
• [llvm] [gsymutil] Verify output string table size and address info offsets do not exceed 32-bit max (PR #181458)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Sam Elliott via llvm-commits
• [flang] [llvm] [flang][cuda] Fix return value for CUFSetDefaultStream (PR #181884)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [flang] [llvm] [flang][cuda] Fix return value for CUFSetDefaultStream (PR #181884)   via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Jay Foad via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add BYTEPERM_4X4 pseudo match and expansion (PR #181885)   Frederick Vu via llvm-commits
• [llvm] [AMDGPU] Add BYTEPERM_4X4 pseudo match and expansion (PR #181885)   via llvm-commits
• [llvm] [AMDGPU] Add BYTEPERM_4X4 pseudo match and expansion (PR #181885)   via llvm-commits
• [clang] [llvm] [clang][ssaf] Fix UB caused by missing virtual dtor of FormatInfoEntry (PR #181838)   Jan Korous via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Eli Friedman via llvm-commits
• [llvm] 7c4b8d8 - [X86] Add (_BitInt(128) & (1 << BitNo)) != 0 test coverage from #147216 (#181880)   via llvm-commits
• [llvm] [X86] Add (_BitInt(128) & (1 << BitNo)) != 0 test coverage from #147216 (PR #181880)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang][ssaf] Fix UB caused by missing virtual dtor of FormatInfoEntry (PR #181838)   Balázs Benics via llvm-commits
• [llvm] 637d3dc - [clang][ssaf] Fix UB caused by missing virtual dtor of FormatInfoEntry (#181838)   via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (PR #181887)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (PR #181887)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (PR #181887)   Nicolas Brunie via llvm-commits
• [llvm] [Offload] Add argument to 'olInit' for global configuration options (PR #181872)   Kevin Sala Penades via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Ryan Buchner via llvm-commits
• [libc] [llvm] [libc][math] Refactor float16 operations to header-only (PR #181745)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor payload_functions family to header-only (PR #181824)   via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Craig Topper via llvm-commits
• [llvm] [modules] Fix warning: missing submodule 'LLVM_IR.FunctionProperties' (PR #181888)   Kai Nacke via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Simon Pilgrim via llvm-commits
• [lld] 42618de - [lld][WebAssembly] clang-format lld/wasm files. NFC (#181871)   via llvm-commits
• [lld] [lld][WebAssembly] clang-format lld/wasm files. NFC (PR #181871)   Sam Clegg via llvm-commits
• [llvm] [NFC][CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] [CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Robert Imschweiler via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Robert Imschweiler via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Jeff Sandoval via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [PowerPC] support tail call optimization on AIX tail call (PR #161690)   Lei Huang via llvm-commits
• [llvm] [PowerPC] support tail call optimization on AIX tail call (PR #161690)   Lei Huang via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Sam Clegg via llvm-commits
• [llvm] 98d8b69 - [Hexagon] Support partial reduction intrinsics (#179797)   via llvm-commits
• [llvm] [Hexagon] Support partial reduction intrinsics (PR #179797)   Alexey Karyakin via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Sam Clegg via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Sam Clegg via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Sam Clegg via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Demetrius Kanios via llvm-commits
• [llvm] [NFC][CodeGen] Minor cleanup in MachineInstr operand printing (PR #181892)   Rahul Joshi via llvm-commits
• [llvm] [Offload] Add argument to 'olInit' for global configuration options (PR #181872)   Joseph Huber via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Sam Clegg via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   via llvm-commits
• [llvm] [NVPTX] Add lowering for v2i32/v2f16/v2f32 scalar_to_vector operations (PR #175712)   via llvm-commits
• [llvm] f26c9ad - [NVPTX] Add lowering for v2i32/v2f16/v2f32 scalar_to_vector operations (#175712)   via llvm-commits
• [llvm] [NVPTX] Add lowering for v2i32/v2f16/v2f32 scalar_to_vector operations (PR #175712)   via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Demetrius Kanios via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Demetrius Kanios via llvm-commits
• [lld] [lld][Webassembly] Avoid a signed overflow on large sections (PR #178287)   Sam Clegg via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from ri.vzero.v (PR #181895)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from ri.vzero.v (PR #181895)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from ri.vzero.v (PR #181895)   Craig Topper via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Justin Holewinski via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Justin Holewinski via llvm-commits
• [llvm] [NFC] `const`-ify argument in `promoteInternals` (readability) (PR #181079)   Mircea Trofin via llvm-commits
• [llvm] [NVPTX] Add lowering for v2i32/v2f16/v2f32 scalar_to_vector operations (PR #175712)   LLVM Continuous Integration via llvm-commits
• [llvm] 54c0f7b - [NFC] `const`-ify argument in `promoteInternals` (readability) (#181079)   via llvm-commits
• [llvm] [NFC] `const`-ify argument in `promoteInternals` (readability) (PR #181079)   Mircea Trofin via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   via llvm-commits
• [llvm] [NFC] `CfiFunctions` are relevant when promoting from the original module only (PR #181080)   Mircea Trofin via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   via llvm-commits
• [llvm] [NFC] `CfiFunctions` are relevant when promoting from the original module only (PR #181080)   Mircea Trofin via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Justin Holewinski via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [libc] [llvm] [LLVM] Port 'llvm-gpu-loader' to use LLVMOffload (PR #162739)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Use const with MI in AMDGPULowerVGPREncoding::computeMode. NFC (PR #181900)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Use const with MI in AMDGPULowerVGPREncoding::computeMode. NFC (PR #181900)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Use const with MI in AMDGPULowerVGPREncoding::computeMode. NFC (PR #181900)   Stanislav Mekhanoshin via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   via llvm-commits
• [libc] [llvm] [LLVM] Port 'llvm-gpu-loader' to use LLVMOffload (PR #162739)   via llvm-commits
• [llvm] [AMDGPU] Use const with MI in AMDGPULowerVGPREncoding::computeMode. NFC (PR #181900)   via llvm-commits
• [libc] [llvm] [LLVM] Port 'llvm-gpu-loader' to use LLVMOffload (PR #162739)   Joseph Huber via llvm-commits
• [libc] [llvm] [LLVM] Port 'llvm-gpu-loader' to use LLVMOffload (PR #162739)   Joseph Huber via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   via llvm-commits
• [llvm] Fix test from #175712 (PR #181905)   via llvm-commits
• [llvm] Fix test from #175712 (PR #181905)   via llvm-commits
• [llvm] [NVPTX] Add lowering for v2i32/v2f16/v2f32 scalar_to_vector operations (PR #175712)   via llvm-commits
• [llvm] Fix test from https://github.com/llvm/llvm-project/pull/175712 (PR #181905)   via llvm-commits
• [llvm] Fix test from #175712 (PR #181905)   via llvm-commits
• [llvm] Fix test from #175712 (PR #181905)   via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   via llvm-commits
• [llvm] Fix test from #175712 (PR #181905)   via llvm-commits
• [llvm] [AMDGPU] Use const with MI in AMDGPULowerVGPREncoding::computeMode. NFC (PR #181900)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Ryan Buchner via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] Fix test from #175712 (PR #181905)   via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Lei Huang via llvm-commits
• [llvm] [CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Minor cleanup in MachineInstr operand printing (PR #181892)   Rahul Joshi via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   Martin Storsjö via llvm-commits
• [llvm] Fix test from #175712 (PR #181905)   via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   Martin Storsjö via llvm-commits
• [llvm] [Offload] Add argument to 'olInit' for global configuration options (PR #181872)   Alex Duran via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from ri.vzero.v (PR #181895)   Sam Elliott via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Lei Huang via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from ri.vzero.v (PR #181895)   Philip Reames via llvm-commits
• [llvm] 74b8ca6 - [RISCV] Remove VMConstraint from ri.vzero.v (#181895)   via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from ri.vzero.v (PR #181895)   Craig Topper via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from ri.vzero.v (PR #181895)   Craig Topper via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   via llvm-commits
• [llvm] [GISel][X86] Port CSE analysis to NPM (PR #179815)   Gergo Stomfai via llvm-commits
• [llvm] [AMDGPU] Constrain register class during COPY elimination based on their uses (PR #181909)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Constrain register class during COPY elimination based on their uses (PR #181909)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Constrain register class during COPY elimination based on their uses (PR #181909)   via llvm-commits
• [llvm] [NFC][CodeGen] Minor cleanup in MachineInstr operand printing (PR #181892)   Craig Topper via llvm-commits
• [lld] [lld-macho] Fix thunk insertion for multiple .text sections scenario (PR #175704)   Daniel Hoekwater via llvm-commits
• [llvm] [Offload] Add argument to 'olInit' for global configuration options (PR #181872)   Alex Duran via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] e0b3e82 - [AMDGPU] Constrain register class during COPY elimination based on their uses (#181909)   via llvm-commits
• [llvm] [AMDGPU] Constrain register class during COPY elimination based on their uses (PR #181909)   Chinmay Deshpande via llvm-commits
• [flang] [llvm] [flang][cuda] Fix return value for CUFSetDefaultStream (PR #181884)   Zhen Wang via llvm-commits
• [flang] [llvm] [flang][cuda] Fix return value for CUFSetDefaultStream (PR #181884)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [AMDGPU] Ignore unused VALU src0/1/2 fields when disassembling (PR #175182)   Georg Lehmann via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   LLVM Continuous Integration via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [libc] [llvm] [libc][math] Refactor sincos implementation to header only (PR #177522)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sincos implementation to header only (PR #177522)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sincos implementation to header only (PR #177522)   via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][WebAssembly] Add comment regarding DataCount section. NFC (PR #181869)   Sam Clegg via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf implementation to header-only in src/__support/math folder. (PR #181086)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactored bf16fmaf to Header Only (PR #181919)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored bf16fmaf to Header Only (PR #181919)   via llvm-commits
• [llvm] [GlobalISel] port rewrite from SelectionDAG to GlobalISel (PR #181486)   Luisa Cicolini via llvm-commits
• [llvm] [GIsel] port rewrite from SelectionDAG to GlobalISel (PR #181486)   Luisa Cicolini via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Rahul Joshi via llvm-commits
• [llvm] [CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [llvm] 6712e91 - [SPIRV] Prevent BB start emission for service functions (#178776)   via llvm-commits
• [llvm] [SPIRV] Prevent BB start emission for service functions (PR #178776)   Michal Paszkowski via llvm-commits
• [libc] [llvm] [libc][math] Refactored bf16fmaf to Header Only (PR #181919)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [SampleProf] Add option to populate profile symbol list from probes (PR #181922)   Wei Wang via llvm-commits
• [llvm] [SampleProf] Add option to populate profile symbol list from probes (PR #181922)   Wei Wang via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [Offload] Add argument to 'olInit' for global configuration options (PR #181872)   Joseph Huber via llvm-commits
• [llvm] [SampleProf] Add option to populate profile symbol list from probes (PR #181922)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored bf16fmaf to Header Only (PR #181919)   via llvm-commits
• [llvm] [SampleProf] Add option to populate profile symbol list from probes (PR #181922)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [llvm] [SampleProf] Add option to populate profile symbol list from probes (PR #181922)   Wei Wang via llvm-commits
• [llvm] [SLP][NFC] Precommit tests for LShr-UDiv power of 2 transformations (PR #181925)   Ryan Buchner via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   LLVM Continuous Integration via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Ryan Buchner via llvm-commits
• [llvm] [SLP][NFC] Precommit tests for LShr-UDiv power of 2 transformations (PR #181925)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   via llvm-commits
• [llvm] [NFC][CodeGen] Rename CallBrPrepare pass to InlineAsmPrepare (PR #181547)   Bill Wendling via llvm-commits
• [llvm] [NFC][CodeGen] Rename CallBrPrepare pass to InlineAsmPrepare (PR #181547)   Bill Wendling via llvm-commits
• [llvm] [NFC][CodeGen] Rename CallBrPrepare pass to InlineAsmPrepare (PR #181547)   Bill Wendling via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly][Clang][MC] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   Muhammad Bassiouni via llvm-commits
• [llvm] [RISCV] Check the error location in xsfvcp-invalid.s. NFC (PR #181929)   Sam Elliott via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly][Clang][MC] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly][Clang][MC] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly][Clang][MC] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly][Clang][MC] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [lld][WebAssembly][Clang][MC] WASIP3 and component model threading support (PR #175800)   Sam Clegg via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [flang] [llvm] [flang][cuda] Add entry points for cudastreamsynchronize (PR #181932)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode: add X86ISD::BZHI handling (PR #177881)   Saina Daneshmand via llvm-commits
• [flang] [llvm] [flang][cuda] Add entry points for cudastreamsynchronize (PR #181932)   via llvm-commits
• [flang] [llvm] [flang][cuda] Add entry points for cudastreamsynchronize (PR #181932)   Zhen Wang via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   Akash Dutta via llvm-commits
• [llvm] Update mailmap entry (PR #181187)   Aiden Grossman via llvm-commits
• [llvm] [RISCV] Add combines to form WSUBAU on RV32 with P. (PR #181604)   Sam Elliott via llvm-commits
• [llvm] fe86f61 - [SLP][NFC] Update partial_vec_invalid_cost() test to avoid breakage by #181731 (#181914)   via llvm-commits
• [llvm] [SLP][NFC] Update partial_vec_invalid_cost() test to avoid breakage by #181731 (PR #181914)   Ryan Buchner via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Rahul Joshi via llvm-commits
• [llvm] 62f4f2f - [SLP][NFC] Precommit tests for LShr-UDiv power of 2 transformations (#181925)   via llvm-commits
• [llvm] [SLP][NFC] Precommit tests for LShr-UDiv power of 2 transformations (PR #181925)   Ryan Buchner via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Rahul Joshi via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   Mohamed Emad via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   via llvm-commits
• [llvm] [CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] 90d1a55 - [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (#181710)   via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   Shilei Tian via llvm-commits
• [llvm] 05c046e - [NFC][CodeGen] Minor cleanup in MachineInstr operand printing (#181892)   via llvm-commits
• [llvm] [NFC][CodeGen] Minor cleanup in MachineInstr operand printing (PR #181892)   Rahul Joshi via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Aiden Grossman via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Aiden Grossman via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [llvm] [CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [llvm] [LLVM][Utils] Fix automerge in git-llvm-push (PR #181766)   Aiden Grossman via llvm-commits
• [llvm] [LLVM][Utils] Fix automerge in git-llvm-push (PR #181766)   Aiden Grossman via llvm-commits
• [llvm] [CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Ryan Buchner via llvm-commits
• [llvm] [TableGen] Rename TheMatcher->TheMatcherList. NFC (PR #181942)   Craig Topper via llvm-commits
• [llvm] [TableGen] Rename TheMatcher->TheMatcherList. NFC (PR #181942)   via llvm-commits
• [llvm] [TableGen] Rename TheMatcher->TheMatcherList. NFC (PR #181942)   via llvm-commits
• [llvm] [TableGen] Rename TheMatcher->TheMatcherList. NFC (PR #181942)   Rahul Joshi via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Dave Bartolomeo via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Rahul Joshi via llvm-commits
• [llvm] 54f3b39 - [TableGen] Rename TheMatcher->TheMatcherList. NFC (#181942)   via llvm-commits
• [llvm] [TableGen] Rename TheMatcher->TheMatcherList. NFC (PR #181942)   Craig Topper via llvm-commits
• [llvm] 3fc48b7 - [RISCV] Check the error location in xsfvcp-invalid.s. NFC (#181929)   via llvm-commits
• [llvm] [RISCV] Check the error location in xsfvcp-invalid.s. NFC (PR #181929)   Craig Topper via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Rahul Joshi via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Rahul Joshi via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [llvm] [LLVM][Utils] Fix automerge in git-llvm-push (PR #181766)   Aiden Grossman via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Rahul Joshi via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Mircea Trofin via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Mircea Trofin via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Mircea Trofin via llvm-commits
• [llvm] [CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Craig Topper via llvm-commits
• [llvm] [NFC][WebAssembly] Add Fast-ISel test for load-ext (PR #181480)   Derek Schuff via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   via llvm-commits
• [llvm] [CI][Docs] Fix capitalization (PR #181949)   Aiden Grossman via llvm-commits
• [llvm] [CI][Docs] Fix capitalization (PR #181949)   Aiden Grossman via llvm-commits
• [llvm] [CI][Docs] Fix capitalization (PR #181950)   Aiden Grossman via llvm-commits
• [llvm] [CI][Docs] Fix capitalization (PR #181950)   Aiden Grossman via llvm-commits
• [llvm] [CI][Docs] Fix capitalization (PR #181950)   Aiden Grossman via llvm-commits
• [llvm] [CI][Docs] Fix capitalization (PR #181950)   Aiden Grossman via llvm-commits
• [llvm] [LLVM][Utils] Fix automerge in git-llvm-push (PR #181766)   Aiden Grossman via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [llvm-cov] Support multicall binary (PR #178294)   Prabhu Rajasekaran via llvm-commits
• [llvm] [LoopUnroll] Remove redundant debug message and update canUnroll() messages (PR #181954)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Remove redundant `LLVM_DEBUG()` in `tryToUnrollLoop()` (PR #178950)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Remove redundant `LLVM_DEBUG()` in `tryToUnrollLoop()` (PR #178950)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Remove redundant debug message and update canUnroll() messages (PR #181954)   via llvm-commits
• [llvm] [NFC][LLVM] Add "using namespace Intrinsic" to Intrinsics.cpp (PR #181951)   via llvm-commits
• [llvm] [NFC][LLVM] Add "using namespace Intrinsic" to Intrinsics.cpp (PR #181951)   via llvm-commits
• [clang] [llvm] [RISCV] Add Xsfmm32a shorthand extension. (PR #181957)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Add Xsfmm32a shorthand extension. (PR #181957)   Craig Topper via llvm-commits
• [llvm] [NFC][Matrix] Make CreateLoop take ConstantInt for Bound/Step (PR #181291)   Aiden Grossman via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif to header only (PR #181525)   Xinlong Chen via llvm-commits
• [llvm] [NFC][Matrix] Make CreateLoop take ConstantInt for Bound/Step (PR #181291)   Aiden Grossman via llvm-commits
• [llvm] fc14b1d - [NFC][Matrix] Make CreateLoop take ConstantInt for Bound/Step   via llvm-commits
• [llvm] [NFC][Matrix] Make CreateLoop take ConstantInt for Bound/Step (PR #181291)   Aiden Grossman via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif to header only (PR #181525)   Xinlong Chen via llvm-commits
• [llvm] [ProfCheck][Matrix] Add profile data where relevant (PR #181292)   Aiden Grossman via llvm-commits
• [llvm] [ProfCheck][Matrix] Add profile data where relevant (PR #181292)   Aiden Grossman via llvm-commits
• [llvm] 7cbf453 - [ProfCheck][Matrix] Add profile data where relevant   via llvm-commits
• [llvm] [ProfCheck][Matrix] Add profile data where relevant (PR #181292)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanf16 to header only (PR #181523)   Xinlong Chen via llvm-commits
• [llvm] [CodeGen] Fix liveness tracking removing live sibling sub-registers (PR #181518)   Brian Cain via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [RISCV] Set RVVConstraint = NoConstraint in tablegen classes with vm=1. NFC (PR #181960)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set RVVConstraint = NoConstraint in tablegen classes with vm=1. NFC (PR #181960)   via llvm-commits
• [llvm] [Hexagon] Add HexagonGlobalScheduler pass (#180803) (PR #181961)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add HexagonGlobalScheduler pass (#180803) (PR #181961)   via llvm-commits
• [llvm] [RISCV] Set RVVConstraint = NoConstraint in tablegen classes with vm=1. NFC (PR #181960)   Craig Topper via llvm-commits
• [llvm] 6eae175 - [RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (#181887)   via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (PR #181887)   Craig Topper via llvm-commits
• [llvm] ca16347 - [DDG][NFC] Colorize DDG dot graph (#181618)   via llvm-commits
• [llvm] [DDG][NFC] Colorize DDG dot graph (PR #181618)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SelectionDAG] Avoid redundant node visits in EnforceNodeIdInvariant (PR #164834)   via llvm-commits
• [llvm] [VPlan] Remove VPDerivedIVRecipe and VPScalarIVStepsRecipe from VPHeaderPHIRecipe doc comment. NFC (PR #181862)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [llvm] [green-dragon] fix test param in triggered bisection jobs (PR #181962)   Justice Adams via llvm-commits
• [llvm] [green-dragon] fix test param in triggered bisection jobs (PR #181962)   Justice Adams via llvm-commits
• [llvm] [green-dragon] fix test param in triggered bisection jobs (PR #181962)   via llvm-commits
• [llvm] [Hexagon] Add HexagonGlobalScheduler pass (#180803) (PR #181961)   via llvm-commits
• [llvm] [Hexagon] Add HexagonGlobalScheduler pass (#180803) (PR #181961)   via llvm-commits
• [llvm] [green-dragon] fix test param in triggered bisection jobs (PR #181962)   Justice Adams via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextafter family to header-only (PR #181673)   via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextdown family to header-only (PR #181679)   via llvm-commits
• [llvm] [RISCV] Set RVVConstraint = NoConstraint in tablegen classes with vm=1. NFC (PR #181960)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set RVVConstraint = NoConstraint in tablegen classes with vm=1. NFC (PR #181960)   Craig Topper via llvm-commits
• [llvm] a2e14e4 - [RISCV] Add Xsfmm32a shorthand extension. (#181957)   via llvm-commits
• [clang] [llvm] [RISCV] Add Xsfmm32a shorthand extension. (PR #181957)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use getNamedOperandIdx in the RVVConstraint checks. (PR #181936)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use getNamedOperandIdx in the RVVConstraint checks. (PR #181936)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] c5ac41d - [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (#181095)   via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Lidong Yan via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [polly] [Polly][ScopInfo] Lazy Scop instantiation (PR #179535)   Karthika Devi C via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [lld] 371e0e2 - [ELF] Add target-specific relocation scanning for AArch64 (#181099)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lldb] [llvm] [NFC] Ensure MCTargetOptions outlives MCAsmInfo at createMCAsmInfo call sites (PR #180465)   Fangrui Song via llvm-commits
• [lldb] [llvm] [MC] Move MCTargetOptions pointer from MCContext to MCAsmInfo (PR #180464)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Set RVVConstraint = NoConstraint in tablegen classes with vm=1. NFC (PR #181960)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use getNamedOperandIdx in the RVVConstraint checks. (PR #181936)   Sam Elliott via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Manasij Mukherjee via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Manasij Mukherjee via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [llvm] [LoopUnroll] Remove redundant debug message in `UCE::canUnroll()` (PR #181954)   Justin Fargnoli via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Manasij Mukherjee via llvm-commits
• [llvm] [VPlan] Run narrowInterleaveGroups during general VPlan optimizations. (PR #149706)   Shunsuke Watanabe via llvm-commits
• [llvm] d40f7a2 - Revert "[ADT] Add const check to MutableArrayRef constructor (#181190)"   Kadir Cetinkaya via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [RISCV] Add test cases showing RegisterScavenger crash (PR #181537)   Mikael Holmen via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [llvm] 97fa3e5 - [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (#177114)   via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Shih-Po Hung via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #181802)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #181802)   Fangrui Song via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU][GlobalISel][NFC] Filter getCandidatesForLowering to only process G_PHI (PR #181814)   Pankaj Dwivedi via llvm-commits
• [llvm] [BOLT][BTI] Patch ignored functions in place when targeting them with indirect branches (PR #177165)   Gergely Bálint via llvm-commits
• [llvm] [LoopUnrollPass] Remove redundant debug message in `tryToUnrollLoop()` (PR #181954)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Remove redundant debug message in `tryToUnrollLoop()` (PR #181954)   via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" output constraints (PR #181973)   Bill Wendling via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" output constraints (PR #181973)   via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   Pierre van Houtryve via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Guy David via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [compiler-rt] [ASan] Fix crash in __asan_region_is_poisoned at application memory boundaries (PR #180223)   Roman Vinogradov via llvm-commits
• [llvm] [NFC][AMDGPU] Use `zeroinitializer` instead of `null` for `ptr addrspace(2/3/5)` in AMDGPU tests (PR #181710)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Use const with MI in AMDGPULowerVGPREncoding::computeMode. NFC (PR #181900)   Matt Arsenault via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] 867272d - [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (#180542)   via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] [KnownBits] Remove unneccessary calls to std::optional<bool> constructor. NFC (PR #181959)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (PR #173999)   Anatoly Trosinenko via llvm-commits
• [llvm] [AMDGPU] Constrain register class during COPY elimination based on their uses (PR #181909)   Matt Arsenault via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [InstCombine] Allow simplifying FP selects of cmpxchg instructions. (PR #181977)   Ricardo Jesus via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [AMDGPU] Constrain register class during COPY elimination based on their uses (PR #181909)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (PR #173999)   via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] [AMDGPU] Fold v_perm pair into v_swap (PR #181966)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Sander de Smalen via llvm-commits
• [llvm] 0786f2d - [X86] LowerAndToBT - convert to SDPatternMatch (#181696)   via llvm-commits
• [llvm] [X86] LowerAndToBT - convert to SDPatternMatch (PR #181696)   Simon Pilgrim via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] [MIR][MachineInstr] Update MachineInstr::eraseFromParent() to return an iterator (PR #179787)   Matt Arsenault via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Enable MaxInterleaveFactor4 for cortex-x series CPUs. (PR #181851)   David Sherwood via llvm-commits
• [llvm] [AArch64] Enable MaxInterleaveFactor4 for cortex-x series CPUs. (PR #181851)   David Sherwood via llvm-commits
• [llvm] [AArch64] Enable MaxInterleaveFactor4 for cortex-x series CPUs. (PR #181851)   David Sherwood via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   LLVM Continuous Integration via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [X86] Stop emitting CFI instructions on i386-windows (PR #135648)   Sergei Barannikov via llvm-commits
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• [llvm] [X86] Stop emitting CFI instructions on i386-windows (PR #135648)   Sergei Barannikov via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] [InstCombine] Allow simplifying FP selects of cmpxchg instructions. (PR #181977)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel][NFC] Filter getCandidatesForLowering to only process G_PHI (PR #181814)   Pankaj Dwivedi via llvm-commits
• [llvm] 3d369cc - [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (#181161)   via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fold MIN/MAX(Vec[0], Vec[1]) to VECREDUCE_MIN/MAX(Vec) (PR #181162)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] Add additional test coverage for #147216 (PR #181980)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add additional test coverage for #147216 (PR #181980)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Sander de Smalen via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib pass to optimise vector math calls (PR #181981)   David Sherwood via llvm-commits
• [llvm] [Hexagon] Add :mem_noshuf for store-load pairs with no scheduler Order dep (PR #181456)   Ankit Aggarwal via llvm-commits
• [llvm] 051d125 - Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC. (#181979)   via llvm-commits
• [llvm] Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC. (PR #181979)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Fold MIN/MAX(Vec[0], Vec[1]) to VECREDUCE_MIN/MAX(Vec) (PR #181162)   Benjamin Maxwell via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fold MIN/MAX(Vec[0], Vec[1]) to VECREDUCE_MIN/MAX(Vec) (PR #181162)   Benjamin Maxwell via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] [AArch64] Fold MIN/MAX(Vec[0], Vec[1]) to VECREDUCE_MIN/MAX(Vec) (PR #181162)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib pass to optimise vector math calls (PR #181981)   via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Benjamin Maxwell via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Antonio Frighetto via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Antonio Frighetto via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Antonio Frighetto via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Antonio Frighetto via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Benjamin Maxwell via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   via llvm-commits
• [llvm] [AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (PR #173999)   Anatoly Trosinenko via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Florian Hahn via llvm-commits
• [llvm] [X86][GISel] lower GOT-relative G_GLOBAL_VALUEs (PR #181983)   Rose Hudson via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [X86][GISel] lower GOT-relative G_GLOBAL_VALUEs (PR #181983)   via llvm-commits
• [llvm] [X86][GISel] lower GOT-relative G_GLOBAL_VALUEs (PR #181983)   via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Nikita Popov via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [LoopInterchange] Update UTC version (NFC) (PR #181988)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update UTC version (NFC) (PR #181988)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update UTC version (NFC) (PR #181988)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [LoopInterchange] Update UTC version (NFC) (PR #181988)   via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   Ankit Aggarwal via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   Ankit Aggarwal via llvm-commits
• [llvm] [AMDGPU] Add BYTEPERM_4X4 pseudo match and expansion (PR #181885)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (PR #181877)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Matt Arsenault via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86][GISel] lower GOT-relative G_GLOBAL_VALUEs (PR #181983)   Evgenii Kudriashov via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [LoopInterchange] Update UTC version (NFC) (PR #181988)   Michael Kruse via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   Matt Arsenault via llvm-commits
• [llvm] e6cff75 - [X86] combineMOVMSK - pull out repeated SDLoc (#181986)   via llvm-commits
• [llvm] [X86] combineMOVMSK - pull out repeated SDLoc (PR #181986)   Simon Pilgrim via llvm-commits
• [llvm] 6012aa1 - [AMDGPU] Fix opcode comparison logic for G_INTRINSIC (#156008)   via llvm-commits
• [llvm] [AMDGPU] Fix opcode comparison logic for G_INTRINSIC (PR #156008)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix opcode comparison logic for G_INTRINSIC (PR #156008)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   Nikita Popov via llvm-commits
• [llvm] a13e04a - [LoopInterchange] Update UTC version (NFC) (#181988)   via llvm-commits
• [llvm] [LoopInterchange] Update UTC version (NFC) (PR #181988)   Ryotaro Kasuga via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   Matt Arsenault via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   Ryotaro Kasuga via llvm-commits
• [llvm] 10ccf11 - [Tablegen] Patch RegUnitIntervals Initialization (#181173)   via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] draft: [Hexagon] Fix compile-time blowup with partially-reserved physregs (PR #181728)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   Petar Avramovic via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [AArch64] Fold MIN/MAX(Vec[0], Vec[1]) to VECREDUCE_MIN/MAX(Vec) (PR #181162)   Paul Walker via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_EXTRACT (PR #181036)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Benjamin Maxwell via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [AArch64] Improve post-inc stores of SIMD/FP values (PR #151372)   Guy David via llvm-commits
• [llvm] [AArch64] Improve post-inc stores of SIMD/FP values (PR #151372)   Guy David via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   via llvm-commits
• [llvm] [AArch64] Improve post-inc stores of SIMD/FP values (PR #151372)   Guy David via llvm-commits
• [llvm] 17b4a72 - [llvm-reduce] Add a pass to replace unconditional branches with returns (#180993)   via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AArch64] Improve post-inc stores of SIMD/FP values (PR #151372)   Guy David via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   Florian Hahn via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Petar Avramovic via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [Offload] Add argument to 'olInit' for global configuration options (PR #181872)   Alex Duran via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Michael Kruse via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   via llvm-commits
• [llvm] [X86] combineSETCC - merge inner isScalarInteger() condition. NFC. (PR #182004)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [X86] combineSETCC - merge inner isScalarInteger() condition. NFC. (PR #182004)   Simon Pilgrim via llvm-commits
• [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Alexey Bataev via llvm-commits
• [llvm] f8f799c - [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (#181677)   via llvm-commits
• [llvm] [DAG] Fold (X +/- Y) & Y --> ~X & Y when Y is a power of 2 (or zero). (PR #181677)   Simon Pilgrim via llvm-commits
• [llvm] [Offload] Always check/consume Error (PR #182008)   Jan Patrick Lehr via llvm-commits
• [llvm] [X86] LowerAndToBT - fold ICMP_ZERO(AND(X, AND(Y, SHL(1, Z)))) -> BT(AND(X,Y),Z) patterns (PR #182007)   Simon Pilgrim via llvm-commits
• [llvm] d154ec7 - [VPlan] Use ExitingIVValue for pointer inductions as well. (#180925)   via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Pengcheng Wang via llvm-commits
• [llvm] 9a55899 - [X86] combineSETCC - merge inner isScalarInteger() condition. NFC. (#182004)   via llvm-commits
• [llvm] [X86] combineSETCC - merge inner isScalarInteger() condition. NFC. (PR #182004)   Simon Pilgrim via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::unifySubscriptType` (PR #181607)   Ryotaro Kasuga via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [WIP][AMDGPU] Coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] [WIP][AMDGPU] Coverity fixes (PR #182013)   via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [bazel] Add cc_binary rule for 'clang-query' (PR #182014)   Davide Cunial via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [llvm] [WIP][AMDGPU] Coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] a7878d4 - [modules] Fix warning: missing submodule 'LLVM_IR.FunctionProperties' (#181888)   via llvm-commits
• [llvm] [modules] Fix warning: missing submodule 'LLVM_IR.FunctionProperties' (PR #181888)   Kai Nacke via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [NFC][AArch64] Refactor AArch64ConditionOptimizer (PR #177521)   David Spickett via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   Phoebe Wang via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   Mohamed Emad via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   Phoebe Wang via llvm-commits
• [llvm] [NFC][AArch64] Refactor AArch64ConditionOptimizer (PR #177521)   Hussam A. via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   via llvm-commits
• [llvm] [NFC][AArch64] Refactor AArch64ConditionOptimizer (PR #177521)   Hussam A. via llvm-commits
• [llvm] [NFC][AArch64] Refactor AArch64ConditionOptimizer (PR #177521)   David Spickett via llvm-commits
• [llvm] [bazel] Add cc_binary rule for 'clang-query' (PR #182014)   Davide Cunial via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Sander de Smalen via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [NFC][CodeGen] Add braces for else per LLVM coding standard (PR #181750)   Jay Foad via llvm-commits
• [llvm] [bazel] Add cc_binary rule for 'clang-query' (PR #182014)   Davide Cunial via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] 9355a17 - [AArch64] Clean up fp16_i16_intrinsic_scalar.ll a little. NFC   David Green via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   Mohamed Emad via llvm-commits
• [llvm] [X86] LowerAndToBT - fold ICMP_ZERO(AND(X, AND(Y, SHL(1, Z)))) -> BT(AND(X,Y),Z) patterns (PR #182007)   Phoebe Wang via llvm-commits
• [llvm] [X86] LowerAndToBT - fold ICMP_ZERO(AND(X, AND(Y, SHL(1, Z)))) -> BT(AND(X,Y),Z) patterns (PR #182007)   Phoebe Wang via llvm-commits
• [llvm] [X86] LowerAndToBT - fold ICMP_ZERO(AND(X, AND(Y, SHL(1, Z)))) -> BT(AND(X,Y),Z) patterns (PR #182007)   Phoebe Wang via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [AMDGPU][GlobalISel][NFC] Filter getCandidatesForLowering to only process G_PHI (PR #181814)   Petar Avramovic via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Andrew Savonichev via llvm-commits
• [llvm] 8d2eb4e - [AArch64] Fix PRCVT -> FPRCVT typo. NFC   David Green via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanf16 to header only (PR #181523)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanf16 to header only (PR #181523)   Muhammad Bassiouni via llvm-commits
• [llvm] [Inline] Accumulate the cost of the inlined function to the new call site (PR #111104)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif to header only (PR #181525)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif to header only (PR #181525)   Muhammad Bassiouni via llvm-commits
• [llvm] [Inline] Accumulate the cost of the inlined function to the new call site (PR #111104)   via llvm-commits
• [llvm] [Inline] Accumulate the cost of the inlined function to the new callsite (PR #111104)   via llvm-commits
• [llvm] [WebAssembly] Fix getOrCreateFunctionTableSymbol() when __indirect_function_table declared (PR #182026)   Hood Chatham via llvm-commits
• [llvm] [bazel] Add cc_binary rule for 'clang-query' (PR #182014)   Davide Cunial via llvm-commits
• [llvm] [WebAssembly] Fix getOrCreateFunctionTableSymbol() when __indirect_function_table declared (PR #182026)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16add Math Functions to Header Only (PR #181777)   Muhammad Bassiouni via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Andrew Savonichev via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Benjamin Maxwell via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [X86] LowerAndToBT - fold ICMP_ZERO(AND(X, AND(Y, SHL(1, Z)))) -> BT(AND(X,Y),Z) patterns (PR #182007)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   Phoebe Wang via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   Muhammad Bassiouni via llvm-commits
• [llvm] [X86] LowerAndToBT - fold ICMP_ZERO(AND(X, AND(Y, SHL(1, Z)))) -> BT(AND(X,Y),Z) patterns (PR #182007)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   Muhammad Bassiouni via llvm-commits
• [llvm] [X86] LowerAndToBT - fold ICMP_ZERO(AND(X, AND(Y, SHL(1, Z)))) -> BT(AND(X,Y),Z) patterns (PR #182007)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerAndToBT - fold ICMP_ZERO(AND(X, AND(Y, SHL(1, Z)))) -> BT(AND(X,Y),Z) patterns (PR #182007)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   David Green via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Petar Avramovic via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   Muhammad Bassiouni via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Sander de Smalen via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [libc] [llvm] [libc][math] Refactor `logbl` to header only (PR #181659)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   Muhammad Bassiouni via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Paul Walker via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   David Green via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   David Spickett via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   David Spickett via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   David Spickett via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   David Spickett via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   David Spickett via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   David Spickett via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   David Spickett via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   Muhammad Bassiouni via llvm-commits
• [llvm] [bazel] Add cc_binary rule for 'clang-query' (PR #182014)   Davide Cunial via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor `bf16fmaf128` to header-only (PR #182009)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor `bf16fmaf128` to header-only (PR #182009)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor `bf16fmaf128` to header-only (PR #182009)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #182028)   Tarcísio Fischer via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #182028)   via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #182028)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   Matt Arsenault via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [lld] [lld][RISCV] More fine-grained __global_pointer$ placement (PR #182029)   via llvm-commits
• [compiler-rt] [ASan/sanitizers] Make stack unwinding better on Windows. (PR #180205)   via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Steven Perron via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] 88872a7 - [CodeGen] Refactor register operand parsing in MI parser (#181748)   via llvm-commits
• [llvm] [CodeGen] Refactor register operand parsing in MI parser (PR #181748)   Rahul Joshi via llvm-commits
• [llvm] [AArch64] Always print the PRFM operation name (PR #182035)   Kerry McLaughlin via llvm-commits
• [llvm] [NFC][LLVM] Add "using namespace Intrinsic" to Intrinsics.cpp (PR #181951)   Rahul Joshi via llvm-commits
• [llvm] [AArch64] Always print the PRFM operation name (PR #182035)   via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Matt Arsenault via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Matt Arsenault via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Petar Avramovic via llvm-commits
• [llvm] [InstCombine] Allow simplifying FP selects of cmpxchg instructions. (PR #181977)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Allow simplifying FP selects of cmpxchg instructions. (PR #181977)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Allow simplifying FP selects of cmpxchg instructions. (PR #181977)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Allow simplifying FP selects of cmpxchg instructions. (PR #181977)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Sean Perry via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Dmitry Sidorov via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divl to header-only (#181025) (PR #181535)   via llvm-commits
• [clang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   Muhammad Bassiouni via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Jay Foad via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   Simon Pilgrim via llvm-commits
• [llvm] 80e7404 - [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (#181994)   via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Benjamin Maxwell via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   Akash Dutta via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   Akash Dutta via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   via llvm-commits
• [llvm] [DAG] expandCLMUL - unroll vector clmul if vector multiplies are not supported (PR #182041)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] expandCLMUL - unroll vector clmul if vector multiplies are not supported (PR #182041)   via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Jay Foad via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Jay Foad via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Jay Foad via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Jay Foad via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   LLVM Continuous Integration via llvm-commits
• [llvm] [Hexagon] Add HexagonGlobalScheduler pass (#180803) (PR #181961)   Fateme Hosseini via llvm-commits
• [llvm] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jameson Nash via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [llvm] [TableGen] Introduce MatcherList to manage a linked list of Matchers. NFC (PR #177875)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Introduce MatcherList to manage a linked list of Matchers. NFC (PR #177875)   Sergei Barannikov via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Luke Lau via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] lower fptrunc.round(rtz) to cvt_pkrtz_f16_f32 (PR #177069)   Brox Chen via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] lower fptrunc.round(rtz) to cvt_pkrtz_f16_f32 (PR #177069)   Brox Chen via llvm-commits
• [clang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Alexander Richardson via llvm-commits
• [clang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Alexander Richardson via llvm-commits
• [clang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Alexander Richardson via llvm-commits
• [clang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Alexander Richardson via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Yingwei Zheng via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Lei Huang via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Lei Huang via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Lei Huang via llvm-commits
• [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Alexey Bataev via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [llvm] [NFC] Re-enable* MSVC C4503 diagnostic (PR #182049)   Aaron Ballman via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Nikita Popov via llvm-commits
• [clang] [llvm] [AMDGPU] Enable sin/cos to sincos folding for HIP (PR #181774)   Yaxun Liu via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [clang] [llvm] [analyzer] Remove the alpha.core.FixedAddr checker (PR #182033)   Donát Nagy via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Philip Reames via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Philip Reames via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Paul Walker via llvm-commits
• [llvm] Fix Bazel build for c5ae550 (PR #182050)   Yi Zhang via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Nikita Popov via llvm-commits
• [llvm] [bazel] fix for c5ae550 #179284 (PR #182050)   Yi Zhang via llvm-commits
• [llvm] [ARM] optimize to `vsri`/`vsli` (PR #182051)   Folkert de Vries via llvm-commits
• [llvm] [bazel] fix for c5ae550 #179284 (PR #182050)   Yi Zhang via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Nikita Popov via llvm-commits
• [llvm] [TableGen] Assert that InstrMapping column values are valid (PR #182052)   Jay Foad via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [TableGen] Assert that InstrMapping column values are valid (PR #182052)   via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Jay Foad via llvm-commits
• [llvm] [X86] Fix linker error after #181994 (PR #182053)   Mirko Brkušanin via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   Mirko Brkušanin via llvm-commits
• [llvm] [CMake] Turn on LLVM_USE_SPLIT_DWARF by default for Linux Debug build (PR #80328)   Jinsong Ji via llvm-commits
• [llvm] [SandboxIR] Don't add dup instantiation for clang (PR #116387)   Jinsong Ji via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   via llvm-commits
• [llvm] [LoopUnrollPass] Remove redundant debug message in `tryToUnrollLoop()` (PR #181954)   Aiden Grossman via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [lldb] [llvm] [MC] Move MCTargetOptions pointer from MCContext to MCAsmInfo (PR #180464)   Aiden Grossman via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] b3c82ba - [KnownBits] Remove unneccessary calls to std::optional<bool> constructor. NFC (#181959)   via llvm-commits
• [llvm] [KnownBits] Remove unneccessary calls to std::optional<bool> constructor. NFC (PR #181959)   Craig Topper via llvm-commits
• [llvm] [NFC][WebAssembly] Add Fast-ISel test for load-ext (PR #181480)   Derek Schuff via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [AMDGPU] Use const with MI in AMDGPULowerVGPREncoding::computeMode. NFC (PR #181900)   LLVM Continuous Integration via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Tatham via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Min-Yih Hsu via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [AMDGPU] Add WMMA and SWMMAC instructions for gfx1170 (PR #180731)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   via llvm-commits
• [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Alexey Bataev via llvm-commits
• [llvm] [X86][ProfCheck] Synthesize profile information where relevant (PR #181578)   Joel E. Denny via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Andrei Elovikov via llvm-commits
• [clang] [llvm] [AMDGPU] Add WMMA and SWMMAC instructions for gfx1170 (PR #180731)   Mirko Brkušanin via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Andrei Elovikov via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Andrei Elovikov via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Andrei Elovikov via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage and X86SelectionDAGTest infrastructure (PR #181994)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Fix linker error after #181994 (PR #182053)   Jan Patrick Lehr via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Craig Topper via llvm-commits
• [llvm] fb40f2b - [RISCV] Use getNamedOperandIdx in the RVVConstraint checks. (#181936)   via llvm-commits
• [llvm] [RISCV] Use getNamedOperandIdx in the RVVConstraint checks. (PR #181936)   Craig Topper via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Florian Hahn via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Aiden Grossman via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [llvm] [X86][ProfCheck] Synthesize profile information where relevant (PR #181578)   Aiden Grossman via llvm-commits
• [lld] [lld][RISCV] More fine-grained __global_pointer$ placement (PR #182029)   Craig Topper via llvm-commits
• [lld] [lld][RISCV] More fine-grained __global_pointer$ placement (PR #182029)   Craig Topper via llvm-commits
• [lld] [lld][RISCV] More fine-grained __global_pointer$ placement (PR #182029)   Craig Topper via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Eli Friedman via llvm-commits
• [llvm] [TableGen] Assert that InstrMapping column values are valid (PR #182052)   Craig Topper via llvm-commits
• [llvm] [TableGen] Use INSTRUCTION_LIST_END as a sentinel in InstrMapping tables (PR #182059)   Jay Foad via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Aiden Grossman via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   via llvm-commits
• [llvm] [TableGen] Use INSTRUCTION_LIST_END as a sentinel in InstrMapping tables (PR #182059)   Craig Topper via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Aiden Grossman via llvm-commits
• [llvm] 67ed355 - [RISCV] Remove unnecessary RVVConstraint = NoConstraint from instantiation of VAESKF1_VI/VAESKF2_VI. NFC   Craig Topper via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   via llvm-commits
• [lld] [RFC][lld][SPIRV] Add support for SPIR-V LTO (PR #178749)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [lld] [RFC][lld][SPIRV] Add support for SPIR-V LTO (PR #178749)   Joseph Huber via llvm-commits
• [llvm] [RISCV] Rename PALUVINoVm->ZvkALUVINoVm. NFC (PR #182077)   Craig Topper via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [RISCV] Rename PALUVINoVm->ZvkALUVINoVm. NFC (PR #182077)   via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Joel E. Denny via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [lld] [RFC][lld][SPIRV] Add support for SPIR-V LTO (PR #178749)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [llvm] [TableGen] Return int32_t from InstrMapping table lookup functions. NFC. (PR #182079)   Jay Foad via llvm-commits
• [llvm] [TableGen] Return int32_t from InstrMapping table lookup functions. NFC. (PR #182079)   via llvm-commits
• [llvm] [TableGen] Return int32_t from InstrMapping table lookup functions. NFC. (PR #182079)   via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Justin Holewinski via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Paul Kirth via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Jonas Devlieghere via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Brian Cain via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Slava Zakharin via llvm-commits
• [llvm] [LoopUnrollPass] Use `PragmaCount` instead of reparsing the metadata (NFC) (PR #182080)   Justin Fargnoli via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   Sadaf Ebrahimi via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Justin Holewinski via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [llvm] [NFC] Re-enable MSVC C4351 diagnostic (PR #182082)   Aaron Ballman via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Roy Shi via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   via llvm-commits
• [llvm] [AArch64] Always print the PRFM operation name (PR #182035)   via llvm-commits
• [libc] [llvm] [libc][math] change bf16fmal to be header-only and constexpr-compat (PR #181666)   Muhammad Bassiouni via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Jonas Devlieghere via llvm-commits
• [clang] [llvm] [AMDGPU] Add WMMA and SWMMAC instructions for gfx1170 (PR #180731)   Mirko Brkušanin via llvm-commits
• [llvm] 829afc4 - [AMDGPU] Add WMMA and SWMMAC instructions for gfx1170 (#180731)   via llvm-commits
• [llvm] [NFC] Re-enable MSVC C4351 diagnostic (PR #182082)   Hans Wennborg via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Brian Cain via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Simon Pilgrim via llvm-commits
• [llvm] [LV] capture weights (PR #182087)   Mircea Trofin via llvm-commits
• [llvm] [LV] capture weights (PR #182087)   Mircea Trofin via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Roy Shi via llvm-commits
• [llvm] [AMDGPU] Remove V_DOT2ACC_F32_F16 from gfx1170 (PR #182088)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU] Remove V_DOT2ACC_F32_F16 from gfx1170 (PR #182088)   via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Rahul Joshi via llvm-commits
• [llvm] [RISCV] Separate VMConstraint from RVVConstraint. NFC (PR #182089)   Craig Topper via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [RISCV] Update Andes45 vector floating-point arithmetic scheduling info (PR #181289)   Min-Yih Hsu via llvm-commits
• [llvm] [VPlan] Compute cost for predicated loads/stores to invariant address. (PR #181572)   Andrei Elovikov via llvm-commits
• [llvm] [AMDGPU] Commute instructions to avoid VGPR MSB changes (PR #181918)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [llvm] [MemProf] Optimize BitcodeReader stack id lookups (PR #182097)   Teresa Johnson via llvm-commits
• [llvm] [DX] Mark `dx.resource.getpointer` as convergent (PR #182099)   Finn Plummer via llvm-commits
• [llvm] ee3068b - [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (#181695)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] 27144f4 - [TableGen] Return int32_t from InstrMapping table lookup functions. NFC. (#182079)   via llvm-commits
• [llvm] [TableGen] Return int32_t from InstrMapping table lookup functions. NFC. (PR #182079)   Jay Foad via llvm-commits
• [llvm] [SPIRV] Stop using `createOpType` in `SPIRVGlobalRegistry::getOrCreateUndef` (PR #181726)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Stop using `createOpType` in `SPIRVGlobalRegistry::getOrCreateUndef` (PR #181726)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DX] Mark `dx.resource.getpointer` as convergent (PR #182099)   Finn Plummer via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] [LV] capture weights (PR #182087)   via llvm-commits
• [llvm] [InstCombine] Allow simplifying FP selects of cmpxchg instructions. (PR #181977)   Ricardo Jesus via llvm-commits
• [llvm] [NFC] Re-enable MSVC C4611 diagnostic (PR #182100)   Aaron Ballman via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   via llvm-commits
• [llvm] 15488a7 - [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (#169340)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [llvm] [SLP] Fix `MainOp/AltOp` assertion to check the correct value (PR #182093)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Remove V_DOT2ACC_F32_F16 from gfx1170 (PR #182088)   Matt Arsenault via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX (#176015)" (PR #179553)   Artem Belevich via llvm-commits
• [llvm] [SPIRV] Move `SPIRVTypeInst` to its own header (PR #181668)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Move `SPIRVTypeInst` to its own header (PR #181668)   Nick Sarnie via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Fix `MainOp/AltOp` assertion to check the correct value (PR #182093)   Ryan Buchner via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [AMDGPU] Commute instructions to avoid VGPR MSB changes (PR #181918)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Commute instructions to avoid VGPR MSB changes (PR #181918)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Commute instructions to avoid VGPR MSB changes (PR #181918)   Stanislav Mekhanoshin via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Nikita Popov via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] Use named values in tests. (PR #182102)   Marcos Maronas via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   via llvm-commits
• [llvm] [ConstantFolding] Fix type mismatch in ConstantFolding for vector types. (PR #181695)   Marcos Maronas via llvm-commits
• [llvm] Use named values in tests. (PR #182102)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   Derek Schuff via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Ed Maste via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   via llvm-commits
• [llvm] [SPIRV] Move `SPIRVTypeInst` to its own header (PR #181668)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Move `SPIRVTypeInst` to its own header (PR #181668)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] Use named values in tests. (PR #182102)   Matt Arsenault via llvm-commits
• [llvm] 9b3470d - [DAG] expandCLMUL - unroll vector clmul if vector multiplies are not supported (#182041)   via llvm-commits
• [llvm] [DAG] expandCLMUL - unroll vector clmul if vector multiplies are not supported (PR #182041)   Simon Pilgrim via llvm-commits
• [llvm] [SLP][NFC] Fix `MainOp/AltOp` assertion to check the correct value (PR #182093)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC] Fix `MainOp/AltOp` assertion to check the correct value (PR #182093)   Alexey Bataev via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Stefan Weigl-Bosker via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Chinmay Deshpande via llvm-commits
• [llvm] [NFC][SPIRV] Move `SPIRVTypeInst` to its own header (PR #181668)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Add BYTEPERM_4X4 pseudo match and expansion (PR #181885)   Frederick Vu via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Add BYTEPERM_4X4 pseudo match and expansion (PR #181885)   Frederick Vu via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Nikita Popov via llvm-commits
• [llvm] [SLP][NFC] Fix `MainOp/AltOp` assertion to check the correct value (PR #182093)   Ryan Buchner via llvm-commits
• [lld] [lld][RISCV] More fine-grained __global_pointer$ placement (PR #182029)   via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Shivam Kunwar via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Ed Maste via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Allow UDiv X, C <--> LShr X, log2(C) tranformations in BinOpSameOpcodeHelper (PR #181731)   Alexey Bataev via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   Abhina Sree via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   Abhina Sree via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   Abhina Sree via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Teresa Johnson via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Teresa Johnson via llvm-commits
• [llvm] [NFC] Re-enable MSVC C4351 diagnostic (PR #182082)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor `bf16fmaf128` to header-only (PR #182009)   Mohamed Emad via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   Mohamed Emad via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Honey Goyal via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   via llvm-commits
• [llvm] 3b5ed86 - AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (#180553)   via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Matt Arsenault via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Michael Berg via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Michael Berg via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16sub family to header-only (PR #182115)   Mohamed Emad via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16sub family to header-only (PR #182115)   via llvm-commits
• [llvm] 5155ef7 - [gn build] Fix BUILD.gn formatting   Arthur Eubanks via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [NFC][SPIRV] Move `SPIRVTypeInst` to its own header (PR #181668)   Manuel Carrasco via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Nikita Popov via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   LLVM Continuous Integration via llvm-commits
• [llvm] [bazel][clang] Fix Bazel build after 15488a7f78ce (PR #182117)   Jackson Stogel via llvm-commits
• [llvm] [mlir] [NFC][emacs] Fix emacs lints in the LLVM and MLIR modes (PR #182074)   Krzysztof Drewniak via llvm-commits
• [llvm] [Hexagon] Fix assert on sign-bit CONST32 immediates (PR #182118)   Fateme Hosseini via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Greg Clayton via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [llvm] [bazel][clang] Fix Bazel build after 15488a7f78ce (PR #182117)   Jackson Stogel via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor ceil family to header-only (PR #182121)   Mohamed Emad via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Minsoo Choo via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [libc] [llvm] [libc][math] Refactor ceil family to header-only (PR #182121)   via llvm-commits
• [llvm] [LV] capture weights (PR #182087)   Mircea Trofin via llvm-commits
• [llvm] [DO NOT SUBMIT][LV] Propagate branch weights in VPlan (PR #182087)   Mircea Trofin via llvm-commits
• [llvm] [DO NOT SUBMIT][LV] Propagate branch weights in VPlan (PR #182087)   Mircea Trofin via llvm-commits
• [llvm] [PowerPC] replace inline code with DMFInsert1024 (PR #175997)   LLVM Continuous Integration via llvm-commits
• [llvm] [bazel][clang] Fix Bazel build after 15488a7f78ce (PR #182117)   Jackson Stogel via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   Craig Topper via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   Craig Topper via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Show crash info on start (PR #178027)   Minsoo Choo via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Jon Roelofs via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Craig Topper via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Craig Topper via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [llvm] [bazel][clang] Fix Bazel build after 15488a7f78ce (PR #182117)   Anshul Nigham via llvm-commits
• [llvm] AMDGPU: Regenerate test checks for pow libcall simplify (PR #182127)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Regenerate test checks for pow libcall simplify (PR #182127)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Regenerate test checks for pow libcall simplify (PR #182127)   Matt Arsenault via llvm-commits
• [llvm] 82a586d - AMDGPU: Regenerate test checks for pow libcall simplify (#182127)   via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Zhengyang Liu via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Min-Yih Hsu via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Min-Yih Hsu via llvm-commits
• [llvm] [mlir] [NFC][emacs] Fix emacs lints in the LLVM and MLIR modes (PR #182074)   via llvm-commits
• [llvm] [mlir] [NFC][emacs] Fix emacs lints in the LLVM and MLIR modes (PR #182074)   via llvm-commits
• [llvm] [SandboxIR][Region] Replace exit() with reportFatalUsageError() (PR #182134)   via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Fix assert on sign-bit CONST32 immediates (PR #182118)   via llvm-commits
• [llvm] [Hexagon] Fix assert on sign-bit CONST32 immediates (PR #182118)   via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Michael Berg via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Matt Arsenault via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Nikita Popov via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor copysign family to header-only (PR #182137)   Mohamed Emad via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Michael Berg via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Michael Berg via llvm-commits
• [libc] [llvm] [libc][math] Refactor copysign family to header-only (PR #182137)   via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [libc] [llvm] [libc][math] Refactor dadd family to header-only (PR #182142)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor dadd family to header-only (PR #182142)   via llvm-commits
• [llvm] AMDGPU: Regenerate test checks for pow libcall simplify (PR #182127)   Kewen Meng via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Florian Hahn via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Strengthen materializeFactors with assert (NFC) (PR #181665)   Florian Hahn via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Joseph Huber via llvm-commits
• [llvm] dee675d - AMDGPU: Update another stale test   Matt Arsenault via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   Craig Topper via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   Craig Topper via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   Craig Topper via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Honey Goyal via llvm-commits
• [llvm] [offload][lit] Enable/disable tests on Level Zero when using DeviceRTL (PR #182128)   Nick Sarnie via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   Sam Elliott via llvm-commits
• [llvm] a7c25ba - [SLP][NFC]Fix reorered -> reordered   Alexey Bataev via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [libc] [llvm] [libc][math] Refactor dsub family to header-only (PR #182160)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor dsub family to header-only (PR #182160)   via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Ryan Buchner via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (PR #181877)   via llvm-commits
• [lldb] [llvm] [lldb] Drop incomplete non-8-bit bytes support (PR #182025)   Sergei Barannikov via llvm-commits
• [llvm] [Inline] Accumulate the cost of the inlined function to the new callsite (PR #111104)   Arthur Eubanks via llvm-commits
• [llvm] [AMDGPU] Ensure all PERMLANE instructions are marked as convergent (PR #182162)   via llvm-commits
• [lldb] [llvm] [lldb] Drop incomplete non-8-bit bytes support (PR #182025)   Jonas Devlieghere via llvm-commits
• [llvm] [AMDGPU] Ensure all PERMLANE instructions are marked as convergent (PR #182162)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Alexander Richardson via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Henrik G. Olsson via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmax family to header-only (PR #182165)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmax family to header-only (PR #182165)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   LLVM Continuous Integration via llvm-commits
• [llvm] [Hexagon] Fix assert on sign-bit CONST32 immediates (PR #182118)   Ankit Aggarwal via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Farzon Lotfi via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Henrik G. Olsson via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [Flang-RT][unittests] Fix buffer overflow (PR #182176)   Michael Kruse via llvm-commits
• [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Abhinav Gaba via llvm-commits
• [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Abhinav Gaba via llvm-commits
• [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Abhinav Gaba via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   Reid Kleckner via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16sub family to header-only (PR #182115)   Mohamed Emad via llvm-commits
• [llvm] c6425aa - [SLP]Support reduced or selects of bitmask as cmp bitcast   via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Alex Crichton via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Alex Crichton via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Alex Crichton via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Alex Crichton via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Alex Crichton via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Alex Crichton via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   Mohamed Emad via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [llvm] 27eca71 - [AArch64] Add extra scmp/ucmp costmodel test. NFC   David Green via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   Mohamed Emad via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Min-Yih Hsu via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Min-Yih Hsu via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] e022ea2 - [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (#182091)   via llvm-commits
• [llvm] [SDPatternMatch] Support conditionally binding the value matching a sub-pattern (PR #182091)   Min-Yih Hsu via llvm-commits
• [llvm] [AArch64] Add basic scmp and ucmp costs. (PR #182180)   David Green via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [AArch64] Add basic scmp and ucmp costs. (PR #182180)   via llvm-commits
• [llvm] [AArch64] Add basic scmp and ucmp costs. (PR #182180)   via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [RISCV] Consistently name AVL operands as $vl. NFC (PR #182174)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   via llvm-commits
• [llvm] [RDF] Fix DenseMap reference invalidation in computePhiInfo (PR #182144)   Brian Cain via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [Support] Improve jobserver concurrency handling (PR #178434)   Yaxun Liu via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   Mohamed Emad via llvm-commits
• [flang] [llvm] [flang][cuda] Add entry points for cudastreamsynchronize (PR #181932)   Valentin Clement バレンタイン クレメン via llvm-commits
• [libc] [llvm] [libc][math] Refactor fadd family to header-only (PR #182185)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fadd family to header-only (PR #182185)   via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX (#176015)" (PR #179553)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Akshay Deodhar via llvm-commits
• [llvm] [LLVM][MachinePipeliner] Fix crash during prolog peeling when loop preheader terminates with a fallthrough conditional branch (PR #182189)   Stephen Chou via llvm-commits
• [llvm] [LLVM][MachinePipeliner] Fix crash during prolog peeling when loop preheader terminates with a fallthrough conditional branch (PR #182189)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   Arthur Eubanks via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Akshay Deodhar via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Michael Berg via llvm-commits
• [llvm] f9e0021 - [RISCV] Use getNamedOperandIdx in getFRMOpNum/getVXRMOpNum. NFC (#182181)   via llvm-commits
• [llvm] [RISCV] Use getNamedOperandIdx in getFRMOpNum/getVXRMOpNum. NFC (PR #182181)   Craig Topper via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   via llvm-commits
• [llvm] [TableGen] Introduce RegisterByHwMode (PR #175227)   Alexander Richardson via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Consistently name AVL operands as $vl. NFC (PR #182174)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Consistently name AVL operands as $vl. NFC (PR #182174)   Min-Yih Hsu via llvm-commits
• [llvm] [AMDGPU] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Frederick Vu via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage (PR #182204)   Xinlong Chen via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FANDN coverage (PR #182204)   via llvm-commits
• [llvm] [NFC][AArch64] Extract helper functions in AArch64ConditionOptimizer (PR #182197)   Hussam A. via llvm-commits
• [llvm] 3459bb4 - [TableGen] Introduce RegisterByHwMode   via llvm-commits
• [llvm] [TableGen] Introduce RegisterByHwMode (PR #175227)   Alexander Richardson via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Krzysztof Drewniak via llvm-commits
• [llvm] [win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (PR #182205)   Daniel Paoliello via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Daniel Sanders via llvm-commits
• [llvm] [win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (PR #182205)   via llvm-commits
• [llvm] [win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (PR #182205)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Krzysztof Drewniak via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Daniel Sanders via llvm-commits
• [llvm] [win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (PR #182205)   Eli Friedman via llvm-commits
• [llvm] [LLVM][MachinePipeliner] Fix crash during prolog peeling when loop preheader terminates with a fallthrough conditional branch (PR #182189)   Brian Cain via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Aiden Grossman via llvm-commits
• [llvm] [WIP] fix dominator tree update eliding reachable nodes (PR #177683)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FAND coverage (PR #182204)   Xinlong Chen via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FAND coverage (PR #182204)   Xinlong Chen via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   via llvm-commits
• [llvm] [RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (PR #182124)   LLVM Continuous Integration via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   Craig Topper via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   Craig Topper via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [RISCV] Consistently name AVL operands as $vl. NFC (PR #182174)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [RISCV] Consistently name AVL operands as $vl. NFC (PR #182174)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Rename PALUVINoVm->ZvkALUVINoVm. NFC (PR #182077)   Pengcheng Wang via llvm-commits
• [llvm] [win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (PR #182205)   via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Phoebe Wang via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [llvm] [DTU] fix dominator tree update eliding reachable nodes (PR #177683)   Mircea Trofin via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [llvm] dd4f88f - [ProfCheck] Sort profcheck-xfail.txt   Aiden Grossman via llvm-commits
• [llvm] 3ca5384 - [ProfCheck] Remove now passing tests   Aiden Grossman via llvm-commits
• [llvm] febe605 - [RISCV] Consistently name AVL operands as $vl. NFC (#182174)   via llvm-commits
• [llvm] [RISCV] Consistently name AVL operands as $vl. NFC (PR #182174)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use FSHR in LowerShiftRightParts for P extension on RV64. (PR #181234)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Carl Ritson via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [llvm] [RISCV] Rename PALUVINoVm->ZvkALUVINoVm. NFC (PR #182077)   LLVM Continuous Integration via llvm-commits
• [llvm] [Hexagon] Add :mem_noshuf for store-load pairs with no scheduler Order dep (PR #181456)   Brian Cain via llvm-commits
• [llvm] [InstCombine] Transform splat before n x i1 for vec.reduce.add (PR #182213)   Hongxu Xu via llvm-commits
• [llvm] [InstCombine] Transform splat before n x i1 for vec.reduce.add (PR #182213)   via llvm-commits
• [llvm] [InstCombine] Transform splat before n x i1 for vec.reduce.add (PR #182213)   Hongxu Xu via llvm-commits
• [llvm] [InstCombine] Transform splat before n x i1 for vec.reduce.add (PR #182213)   via llvm-commits
• [llvm] [LLVM][MachinePipeliner] Fix crash during prolog peeling when loop preheader terminates with a fallthrough conditional branch (PR #182189)   Stephen Chou via llvm-commits
• [llvm] [mlir] [NFC][emacs] Fix emacs lints in the LLVM and MLIR modes (PR #182074)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Commute instructions to avoid VGPR MSB changes (PR #181918)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Rename PALUVINoVm->ZvkALUVINoVm. NFC (PR #182077)   LLVM Continuous Integration via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Yingwei Zheng via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMerbeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Luke Lau via llvm-commits
• [llvm] 5d56516 - [NVPTX] Add intrinsics for new narrow FP conversions (#173954)   via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [DAG] Simplify isKnownToBeAPowerOfTwo for ZERO_EXTEND (PR #182226)   via llvm-commits
• [llvm] [DAG] Simplify isKnownToBeAPowerOfTwo for ZERO_EXTEND (PR #182226)   via llvm-commits
• [llvm] 944ef9f - [NFC][WebAssembly] Add Fast-ISel test for load-ext (#181480)   via llvm-commits
• [llvm] [NFC][WebAssembly] Add Fast-ISel test for load-ext (PR #181480)   via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Farzon Lotfi via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Craig Topper via llvm-commits
• [llvm] [TailDup] Allow taildup into predecessor with EH successor (PR #182225)   via llvm-commits
• [llvm] [TailDup] Allow taildup into predecessor with EH successor (PR #182225)   via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Shivam Kunwar via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Shivam Kunwar via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Shivam Kunwar via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DAG] Avoid strictfp nodes in lowering of llvm.fcanonicalize (PR #177399)   Serge Pavlov via llvm-commits
• [llvm] [AMDGPU] Add VEXPORT encoding for gfx13 (PR #181788)   Mariusz Sikora via llvm-commits
• [llvm] [RISCV] Rename $carry operand to $vm. NFC (PR #182229)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename $carry operand to $vm. NFC (PR #182229)   via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   Florian Hahn via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Nathiyaa Sengodan via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Harrison Hao via llvm-commits
• [llvm] [RISCV] Rename $dest to $passthru. NFC (PR #182231)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename $dest to $passthru. NFC (PR #182231)   via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Bill Wendling via llvm-commits
• [llvm] 61fa74b - [AMDGPU] Add VEXPORT encoding for gfx13 (#181788)   via llvm-commits
• [llvm] [AMDGPU] Add VEXPORT encoding for gfx13 (PR #181788)   Mariusz Sikora via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Mikael Holmen via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [RISCV] Rename $dest to $passthru. NFC (PR #182231)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rename $carry operand to $vm. NFC (PR #182229)   Luke Lau via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   via llvm-commits
• [llvm] [NFC][WebAssembly] Add Fast-ISel test for load-ext (PR #181480)   LLVM Continuous Integration via llvm-commits
• [llvm] [BOLT][AArch64] Support Compare-and-Branch instructions without compact code (PR #182045)   Gergely Bálint via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [AMX][NFC] Change pseudo name to reflect isa intent (PR #182235)   via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [AMX][NFC] Change pseudo name to reflect isa intent (PR #182235)   via llvm-commits
• [llvm] [X86] Emit ISD::ADD instead of X86ISD::ADD from combineSubSetcc. NFC (PR #182195)   Sergei Barannikov via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Nathiyaa Sengodan via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [DSE] Consider all dominating conditions in `dominatingConditionImpliesValue` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [BOLT][AArch64] Support Compare-and-Branch instructions without compact code (PR #182045)   Alexandros Lamprineas via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [DSE] Consider all dominating conditions in `dominatingConditionImpliesValue` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Florian Hahn via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Florian Hahn via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Nikita Popov via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   Matt Arsenault via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [AMDGPU] Ensure all PERMLANE instructions are marked as convergent (PR #182162)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly] Use `MachineCycleInfo` in `WebAssemblyFixIrreducibleControlFlow` (PR #182237)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Use `MachineCycleInfo` in `WebAssemblyFixIrreducibleControlFlow` (PR #182237)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Use `MachineCycleInfo` in `WebAssemblyFixIrreducibleControlFlow` (PR #182237)   via llvm-commits
• [llvm] [X86] Emit ISD::ADD instead of X86ISD::ADD from combineSubSetcc. NFC (PR #182195)   Simon Pilgrim via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [X86] For CMP_MASK_CC/CMP_MASK_SCALAR_CC convert CC from MVT::i32 to MVT::i8. (PR #182199)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] c255e3d - [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (#179298)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   Ricardo Jesus via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::unifySubscriptType` (PR #181607)   Ryotaro Kasuga via llvm-commits
• [llvm] [WebAssembly] Use `MachineCycleInfo` in `WebAssemblyFixIrreducibleControlFlow` (PR #182237)   Demetrius Kanios via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::unifySubscriptType` (PR #181607)   Nikita Popov via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   Sander de Smalen via llvm-commits
• [compiler-rt] [ASan] Fix crash in __asan_region_is_poisoned at application memory boundaries (PR #180223)   Roman Vinogradov via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [Flang-RT][unittests] Fix buffer overflow (PR #182176)   Michael Kruse via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::unifySubscriptType` (PR #181607)   Ryotaro Kasuga via llvm-commits
• [clang] [flang] [llvm] [mlir] [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (PR #181855)   Nikita Popov via llvm-commits
• [llvm] 34a61e3 - [IRBuilder] Use ptrtoaddr in CreatePtrDiff() (#181855)   via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Yingwei Zheng via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::unifySubscriptType` (PR #181607)   Nikita Popov via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FAND coverage (PR #182204)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FAND coverage (PR #182204)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FAND coverage (PR #182204)   Simon Pilgrim via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [AArch64] Enable MaxInterleaveFactor4 for cortex-x series CPUs. (PR #181851)   David Green via llvm-commits
• [llvm] [AMX][NFC] Change pseudo name to reflect isa intent (PR #182235)   Simon Pilgrim via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::unifySubscriptType` (PR #181607)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::unifySubscriptType` (PR #181607)   Ryotaro Kasuga via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC] DWARFVerifier: use C-style array instead of brace-enclosed init list (PR #167328)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] e09473c - InstCombine: Add baseline SimplifyDemandedFPClass ldexp tests (#180702)   via llvm-commits
• [llvm] InstCombine: Add baseline SimplifyDemandedFPClass ldexp tests (PR #180702)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] InstCombine: Implement SimplifyDemandedFPClass for ldexp (PR #180703)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][AArch64] Extract helper functions in AArch64ConditionOptimizer (PR #182197)   Nashe Mncube via llvm-commits
• [llvm] [DomFrontier] Fix precedence in assert. NFC (PR #182239)   David Green via llvm-commits
• [llvm] 37460ab - [AArch64] Enable MaxInterleaveFactor4 for cortex-x series CPUs. (#181851)   via llvm-commits
• [llvm] [AArch64] Enable MaxInterleaveFactor4 for cortex-x series CPUs. (PR #181851)   David Green via llvm-commits
• [llvm] [DomFrontier] Fix precedence in assert. NFC (PR #182239)   via llvm-commits
• [llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)   Karthika Devi C via llvm-commits
• [llvm] [DomFrontier] Fix precedence in assert. NFC (PR #182239)   Florian Hahn via llvm-commits
• [llvm] [WebAssembly] Use `MachineCycleInfo` in `WebAssemblyFixIrreducibleControlFlow` (PR #182237)   via llvm-commits
• [llvm] [NFC][AArch64] Extract helper functions in AArch64ConditionOptimizer (PR #182197)   Hussam A. via llvm-commits
• [llvm] [Reassociate] Distribute multiply over add to enable factorization (PR #178201)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Matt Arsenault via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Nikita Popov via llvm-commits
• [llvm] InstCombine: Implement SimplifyDemandedFPClass for ldexp (PR #180703)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] InstCombine: Implement SimplifyDemandedFPClass for ldexp (PR #180703)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Hood Chatham via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][Doc] Small fix for GFX12 release atomic memory model doc (PR #182241)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] Small fix for GFX12 release atomic memory model doc (PR #182241)   Pierre van Houtryve via llvm-commits
• [llvm] [NFC][AArch64] Extract helper functions in AArch64ConditionOptimizer (PR #182197)   David Spickett via llvm-commits
• [llvm] c94e6c0 - [NFC][AArch64] Extract helper functions in AArch64ConditionOptimizer (#182197)   via llvm-commits
• [llvm] [NFC][AArch64] Extract helper functions in AArch64ConditionOptimizer (PR #182197)   David Spickett via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [AMDGPU][Doc] Small fix for GFX12 release atomic memory model doc (PR #182241)   Pierre van Houtryve via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   Ricardo Jesus via llvm-commits
• [llvm] [AMDGPU][Doc] Small fix for GFX12 release atomic memory model doc (PR #182241)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   Ricardo Jesus via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FXOR coverage (PR #182210)   Simon Pilgrim via llvm-commits
• [llvm] 564332e - [X86] computeKnownBitsForTargetNode - add X86ISD::FAND coverage (#182204)   via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FAND coverage (PR #182204)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FXOR coverage (PR #182210)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add X86ISD::FXOR coverage (PR #182210)   Simon Pilgrim via llvm-commits
• [llvm] b881949 - [lldb] Drop incomplete non-8-bit bytes support (#182025)   via llvm-commits
• [lldb] [llvm] [lldb] Drop incomplete non-8-bit bytes support (PR #182025)   Sergei Barannikov via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [X86] For CMP_MASK_CC/CMP_MASK_SCALAR_CC convert CC from MVT::i32 to MVT::i8. (PR #182199)   Sergei Barannikov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   Matt Arsenault via llvm-commits
• [llvm] 114e208 - [LV] Fix sub-reduction PHI in vectorized epilogue (#182072)   via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   Sander de Smalen via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [AMDGPU][Doc] Small fix for GFX12 release atomic memory model doc (PR #182241)   Matt Arsenault via llvm-commits
• [llvm] [LV] Fix sub-reduction PHI in vectorized epilogue (PR #182072)   Sander de Smalen via llvm-commits
• [llvm] Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE (PR #182207)   Matt Arsenault via llvm-commits
• [llvm] e503801 - [DA] Remove `DependenceInfo::unifySubscriptType` (#181607)   via llvm-commits
• [llvm] [DA] Remove `DependenceInfo::unifySubscriptType` (PR #181607)   Ryotaro Kasuga via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Sander de Smalen via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Sander de Smalen via llvm-commits
• [llvm] Support vector `ptrtoint` and `inttoptr` with X86 GlobalISel. (PR #175270)   Matt Arsenault via llvm-commits
• [llvm] fdc4274 - AMDGPU: Perform libcall recognition to replace fast OpenCL pow (#182135)   via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Matt Arsenault via llvm-commits
• [llvm] 4042975 - [LV] Support argmin/argmax with strict predicates. (#170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Matt Arsenault via llvm-commits
• [clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)   via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Hussam Alhassan via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Matt Arsenault via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Sander de Smalen via llvm-commits
• [clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Luke Lau via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Luke Lau via llvm-commits
• [llvm] [RISCV] Ensure false dominates in vmerge peephole (PR #181664)   Luke Lau via llvm-commits
• [llvm] [AArch64] Always print the PRFM operation name (PR #182035)   Kerry McLaughlin via llvm-commits
• [llvm] [Inline] Accumulate the cost of the inlined function to the new callsite (PR #111104)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [llvm] [VPlan] Support plain CFG plans in the verifier. (PR #181817)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Add intrinsic readanylane (PR #115696)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 7b39def - [NFC][SPIRV] Move `SPIRVTypeInst` to its own header (#181668)   via llvm-commits
• [llvm] [NFC][SPIRV] Move `SPIRVTypeInst` to its own header (PR #181668)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Remove last uses of `SPIRVType` (PR #182098)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Dharuni R Acharya via llvm-commits
• [llvm] 86e0504 - [AArch64] Fix codegen for histograms with i64 increments (#181808)   via llvm-commits
• [llvm] [AArch64] Fix codegen for histograms with i64 increments (PR #181808)   Sander de Smalen via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Diana Picus via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   David Spickett via llvm-commits
• [llvm] 6a5375f - [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (#181694)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [VPlan] Plumb recurrence FMFs through VPReductionPHIRecipe via VPIRFlags. NFC (PR #181694)   Luke Lau via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   David Spickett via llvm-commits
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• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   David Spickett via llvm-commits
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• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   David Spickett via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Dharuni R Acharya via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   David Spickett via llvm-commits
• [llvm] [AArch64] C1 Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   David Spickett via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   via llvm-commits
• [llvm] [NFC][SPIRV] Remove last uses of `SPIRVType` (PR #182098)   Juan Manuel Martinez Caamaño via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Minsoo Choo via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Cullen Rhodes via llvm-commits
• [llvm] [LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (PR #180888)   Simon Pilgrim via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Hussam Alhassan via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Jay Foad via llvm-commits
• [llvm] [WIP] SPV_KHR_non_semantic_info (PR #179975)   Manuel Carrasco via llvm-commits
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• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Cullen Rhodes via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Simon Pilgrim via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Cullen Rhodes via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Jay Foad via llvm-commits
• [llvm] 63492ca - [llubi] Add support for GEP/alloca/inttoptr (#181861)   via llvm-commits
• [llvm] [llubi] Add support for GEP/alloca/inttoptr (PR #181861)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   via llvm-commits
• [llvm] [BOLT][AArch64] Support Compare-and-Branch instructions without compact code (PR #182045)   Paschalis Mpeis via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [analyzer] New checker: optin.core.UnconditionalVAArg (PR #175602)   Donát Nagy via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Lucas Ramirez via llvm-commits
• [clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)   Alexis Engelke via llvm-commits
• [clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Lucas Ramirez via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Lucas Ramirez via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Lucas Ramirez via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Lucas Ramirez via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   Congcong Cai via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (PR #181877)   Petar Avramovic via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   Congcong Cai via llvm-commits
• [llvm] [RDF] Fix DenseMap reference invalidation in computePhiInfo (PR #182144)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   Congcong Cai via llvm-commits
• [llvm] Fix MSVC "not all control paths return a value" warning. NFC. (PR #182262)   Simon Pilgrim via llvm-commits
• [llvm] Fix MSVC "not all control paths return a value" warning. NFC. (PR #182262)   via llvm-commits
• [llvm] [Flang-RT][unittests] Fix buffer overflow (PR #182176)   Tarun Prabhu via llvm-commits
• [llvm] [AArch64] Mark X16 as clobbered in PAUTH_EPILOGUE for hint-based PAuthLR (PR #175991)   David Green via llvm-commits
• [llvm] [AArch64] Mark X16 as clobbered in PAUTH_EPILOGUE for hint-based PAuthLR (PR #175991)   David Green via llvm-commits
• [llvm] [AArch64] Mark X16 as clobbered in PAUTH_EPILOGUE for hint-based PAuthLR (PR #175991)   David Green via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Phoebe Wang via llvm-commits
• [llvm] [LV] NFCI: Add RecurKind to VPPartialReductionChain (PR #181705)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Lucas Ramirez via llvm-commits
• [lld] [lld][RISCV] More fine-grained __global_pointer$ placement (PR #182029)   via llvm-commits
• [llvm] a28d89b - [RDF] Fix DenseMap reference invalidation in computePhiInfo (#182144)   via llvm-commits
• [llvm] [RDF] Fix DenseMap reference invalidation in computePhiInfo (PR #182144)   Brian Cain via llvm-commits
• [llvm] [SystemZ] Fix duplicate RUN lines in tests (PR #182273)   Jay Foad via llvm-commits
• [llvm] [SystemZ] Fix duplicate RUN lines in tests (PR #182273)   via llvm-commits
• [llvm] d98d625 - [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (#182021)   via llvm-commits
• [llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)   Simon Pilgrim via llvm-commits
• [llvm] Fix MSVC "not all control paths return a value" warning. NFC. (PR #182262)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Fix duplicate RUN lines in tests (PR #182275)   Jay Foad via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Simon Pilgrim via llvm-commits
• [llvm] [PowerPC] Fix duplicate RUN lines in tests (PR #182275)   via llvm-commits
• [llvm] [X86] Fix duplicate RUN lines in tests (PR #182271)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Fix duplicate RUN lines in tests (PR #182272)   Jessica Clarke via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Ryan Cowan via llvm-commits
• [llvm] [MIPS] Fix duplicate RUN lines in tests (PR #182276)   Jay Foad via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Ryan Cowan via llvm-commits
• [llvm] [MIPS] Fix duplicate RUN lines in tests (PR #182276)   via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf128 to header-only in src/__support/math folder. (PR #182277)   Abhiram Jampani via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   via llvm-commits
• [llvm] [X86] knownbits-vpmadd52.ll - replace extended unicode character with regular ascii (PR #182278)   Simon Pilgrim via llvm-commits
• [llvm] [X86] knownbits-vpmadd52.ll - replace extended unicode character with regular ascii (PR #182278)   Simon Pilgrim via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf128 to header-only in src/__support/math folder. (PR #182277)   via llvm-commits
• [llvm] [Inline] Accumulate the cost of the inlined function to the new callsite (PR #111104)   Nikita Popov via llvm-commits
• [llvm] [RegisterCoalescer] Prefer copy over rematerialization when smaller (PR #182279)   Guy David via llvm-commits
• [llvm] [RegisterCoalescer] Prefer copy over rematerialization when smaller (PR #182279)   via llvm-commits
• [llvm] [bazel] Add llvm_zlib to system include path (PR #121374)   Davide Cunial via llvm-commits
• [llvm] [X86] Fix duplicate RUN lines in tests (PR #182271)   Jay Foad via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] [ARM] Fix duplicate RUN lines in tests (PR #182280)   Jay Foad via llvm-commits
• [llvm] [ARM] Fix duplicate RUN lines in tests (PR #182280)   via llvm-commits
• [llvm] [ARM] Fix duplicate RUN lines in tests (PR #182280)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Fix duplicate RUN lines in tests (PR #182281)   Jay Foad via llvm-commits
• [llvm] [AArch64] Fix duplicate RUN lines in tests (PR #182281)   via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [clang] [llvm] [AMDGPUEmitPrintf] Use CreatePtrDiff() (PR #182283)   Nikita Popov via llvm-commits
• [clang] [llvm] [AMDGPUEmitPrintf] Use CreatePtrDiff() (PR #182283)   via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   David Green via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   David Green via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   David Green via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   David Green via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   David Green via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   David Green via llvm-commits
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• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   David Green via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   David Green via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   David Green via llvm-commits
• [llvm] [AMDGPU] Fix duplicate RUN lines in tests (PR #182286)   Jay Foad via llvm-commits
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• [llvm] [SystemZ] Fix duplicate RUN lines in tests (PR #182273)   Ulrich Weigand via llvm-commits
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• [libc] [llvm] [libc][math] Refactor fmin to header only (PR #182290)   Xinlong Chen via llvm-commits
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• [llvm] [X86] Fix duplicate RUN lines in tests (PR #182271)   Simon Pilgrim via llvm-commits
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• [libc] [llvm] [libc][math] Refactor fmin to header only (PR #182290)   Xinlong Chen via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   Lei Huang via llvm-commits
• [llvm] [NFC][SPIRV] Remove last uses of `SPIRVType` (PR #182299)   Juan Manuel Martinez Caamaño via llvm-commits
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• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix duplicate RUN lines in tests (PR #182272)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix duplicate RUN lines in tests (PR #182272)   Craig Topper via llvm-commits
• [llvm] 25e4e2f - [RISCV] Rename $carry operand to $vm. NFC (#182229)   via llvm-commits
• [llvm] [RISCV] Rename $carry operand to $vm. NFC (PR #182229)   Craig Topper via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Avoid use of ptrtoint (PR #182289)   Alexander Richardson via llvm-commits
• [llvm] 3685f24 - [RISCV] Rename $dest to $passthru. NFC (#182231)   via llvm-commits
• [llvm] [RISCV] Rename $dest to $passthru. NFC (PR #182231)   Craig Topper via llvm-commits
• [llvm] [AArch64] Fix duplicate RUN lines in tests (PR #182281)   David Green via llvm-commits
• [llvm] InstCombine: Fold bitcast of vector with constant to scalar (PR #179042)   Matt Arsenault via llvm-commits
• [llvm] f4a29d9 - [LowerMatrixIntrinsics] Avoid use of ptrtoint (#182289)   via llvm-commits
• [llvm] [LowerMatrixIntrinsics] Avoid use of ptrtoint (PR #182289)   Nikita Popov via llvm-commits
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• [llvm] [AArch64] Fix duplicate RUN lines in tests (PR #182281)   Jay Foad via llvm-commits
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• [llvm] 20bb230 - [X86] Fix duplicate RUN lines in tests (#182271)   via llvm-commits
• [llvm] [X86] Fix duplicate RUN lines in tests (PR #182271)   Jay Foad via llvm-commits
• [llvm] [RegisterCoalescer] Prefer copy over rematerialization when smaller (PR #182279)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Craig Topper via llvm-commits
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• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Craig Topper via llvm-commits
• [llvm] 8928b23 - [X86] Emit ISD::ADD instead of X86ISD::ADD from combineSubSetcc. NFC (#182195)   via llvm-commits
• [llvm] [X86] Emit ISD::ADD instead of X86ISD::ADD from combineSubSetcc. NFC (PR #182195)   Craig Topper via llvm-commits
• [llvm] [AArch64] Add clmul/h/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add clmul/h/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [llvm] eb0e554 - [X86] For CMP_MASK_CC/CMP_MASK_SCALAR_CC convert CC from MVT::i32 to MVT::i8. (#182199)   via llvm-commits
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• [llvm] [X86] For CMP_MASK_CC/CMP_MASK_SCALAR_CC convert CC from MVT::i32 to MVT::i8. (PR #182199)   Craig Topper via llvm-commits
• [llvm] 4ebf34c - [NFC][SPIRV] Remove last uses of `SPIRVType` (#182299)   via llvm-commits
• [llvm] [NFC][SPIRV] Remove last uses of `SPIRVType` (PR #182299)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] InstCombine: Fold bitcast of vector with constant to scalar (PR #179042)   Simon Pilgrim via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Paschalis Mpeis via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   Lei Huang via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Luke Lau via llvm-commits
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• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [AArch64] Add clmul/h/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   David Green via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [X86] avx512-mask-bit-manip.ll - fix T1MSKC pattern (PR #182308)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add clmul/h/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (PR #181887)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (PR #181887)   Craig Topper via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   Ryan Cowan via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Luke Lau via llvm-commits
• [llvm] [AArch64] Add clmul/h/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add clmul/h/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   David Green via llvm-commits
• [llvm] [RISCV] Add ComplexPatterns for matching xor/vmnot_vl+vmset_vl. NFC (PR #182071)   Craig Topper via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Craig Topper via llvm-commits
• [llvm] 78798b2 - [AMDGPU] Fix duplicate RUN lines in tests (#182286)   via llvm-commits
• [llvm] [AMDGPU] Fix duplicate RUN lines in tests (PR #182286)   Jay Foad via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [llvm] [AArch64] Add clmul/h/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   David Green via llvm-commits
• [llvm] [DomFrontier] Fix precedence in assert. NFC (PR #182239)   Andrei Elovikov via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   zhijian lin via llvm-commits
• [llvm] 949d682 - [DomFrontier] Fix precedence in assert. NFC (#182239)   via llvm-commits
• [llvm] [DomFrontier] Fix precedence in assert. NFC (PR #182239)   David Green via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (PR #181887)   via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Simon Pilgrim via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] 04914f1 - [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (#178912)   via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
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• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [mlir] [NFC][emacs] Fix emacs lints in the LLVM and MLIR modes (PR #182074)   Krzysztof Drewniak via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [ARM] Fix duplicate RUN lines in tests (PR #182280)   Jay Foad via llvm-commits
• [llvm] [ARM] Fix duplicate RUN lines in tests (PR #182280)   Jay Foad via llvm-commits
• [llvm] [ARM] Fix duplicate RUN lines in tests (PR #182280)   David Green via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Andrei Elovikov via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Asher Dobrescu via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Aiden Grossman via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Florian Hahn via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   Brian Cain via llvm-commits
• [llvm] [AArch64][llvm] Remove `+xs` gating for `tlbip *nxs` instructions (PR #179435)   Jonathan Thackray via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Aiden Grossman via llvm-commits
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• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   Brian Cain via llvm-commits
• [llvm] [AArch64][llvm] Remove `+xs` gating for `tlbip *nxs` instructions (PR #179435)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   Aiden Grossman via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   Aiden Grossman via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   Derek Schuff via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] docs: Delete incorrect code generation section of HowToSubmitABug (PR #182315)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Min-Yih Hsu via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   via llvm-commits
• [llvm] e80e940 - [X86] combineCMov - fold CMOV(LOAD(PTR0), LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (#182084)   via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [llvm] [RISCV] Extend vp.reverse vp.load/vp.store combine to non-VP splice + reverse (PR #180907)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Derek Schuff via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [llvm] 7d9d392 - [WebAssembly] Fix SELECT_CC lowering for reference types (#181622)   via llvm-commits
• [llvm] [WebAssembly] Fix SELECT_CC lowering for reference types (PR #181622)   Derek Schuff via llvm-commits
• [llvm] [DirectX] Mark `dx.resource.getpointer` as convergent (PR #182099)   Finn Plummer via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Craig Topper via llvm-commits
• [llvm] [RISCV] Consistently name AVL operands as $vl. NFC (PR #182174)   Min-Yih Hsu via llvm-commits
• [llvm] [win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (PR #182205)   Daniel Paoliello via llvm-commits
• [flang] [llvm] [mlir] [Flang] Add lowering support for depobj in depend clause (PR #124523)   Deepak Eachempati via llvm-commits
• [llvm] 6fdbcf6 - tools: Remove untested PluginLoader includes (#117644)   via llvm-commits
• [clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)   Matt Arsenault via llvm-commits
• [llvm] c3745fe - docs: Delete incorrect code generation section of HowToSubmitABug (#182315)   via llvm-commits
• [llvm] docs: Delete incorrect code generation section of HowToSubmitABug (PR #182315)   Matt Arsenault via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix lowering of canonicalize when amdgpu-ieee is disabled (PR #175867)   Jun Wang via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] ac16ce3 - [ARM] Regenerate checks in machine-sink-multidef.mir (#182314)   via llvm-commits
• [llvm] [ARM] Regenerate checks in machine-sink-multidef.mir (PR #182314)   Jay Foad via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Allow tail folding with IVs with outside users (PR #182322)   Luke Lau via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] [VPlan] Allow tail folding with IVs with outside users (PR #182322)   via llvm-commits
• [llvm] [VPlan] Allow tail folding with IVs with outside users (PR #182322)   Luke Lau via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Graham Hunter via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Graham Hunter via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Sander de Smalen via llvm-commits
• [llvm] [emacs] Rework tablegen mode (PR #182076)   Krzysztof Drewniak via llvm-commits
• [llvm] 015ea59 - [AArch64][llvm] Remove `+xs` gating for `tlbip *nxs` instructions (#179435)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+xs` gating for `tlbip *nxs` instructions (PR #179435)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   Craig Topper via llvm-commits
• [llvm] f437315 - [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (#165747)   via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Craig Topper via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   Michael Kruse via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [RISCV] Use getFRMOpNum/getVXRMOpNum to avoid assumption about operand order. NFCI (PR #182328)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use getFRMOpNum/getVXRMOpNum to avoid assumption about operand order. NFCI (PR #182328)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Ed Maste via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Demetrius Kanios via llvm-commits
• [llvm] [NFC][SPIRV] Replace uses of `removeFromParent` by `eraseFromParent` (PR #182330)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Replace uses of `removeFromParent` by `eraseFromParent` (PR #182330)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Replace uses of `removeFromParent` by `eraseFromParent` (PR #182330)   via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Matt Arsenault via llvm-commits
• [llvm] [X86] avx512-mask-bit-manip.ll - fix T1MSKC pattern (PR #182308)   Simon Pilgrim via llvm-commits
• [llvm] [X86] avx512-mask-bit-manip.ll - fix T1MSKC pattern (PR #182308)   Simon Pilgrim via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Aiden Grossman via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Matt Arsenault via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Matt Arsenault via llvm-commits
• [llvm] [MIR][MachineInstr] Update MachineInstr::eraseFromParent() to return an iterator (PR #179787)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [llvm] [VPlan] Allow tail folding with IVs with outside users (PR #182322)   via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   Matt Arsenault via llvm-commits
• [llvm] a8cd1ac - [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (#181283)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Minsoo Choo via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Aiden Grossman via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Aiden Grossman via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   Demetrius Kanios via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   Demetrius Kanios via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   Sadaf Ebrahimi via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Changpeng Fang via llvm-commits
• [llvm] 4db69f4 - [win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (#182205)   via llvm-commits
• [llvm] [win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (PR #182205)   Daniel Paoliello via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Florian Hahn via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   via llvm-commits
• [llvm] [RISCV] Add RISCVII::getTWidenOpNum. NFC (PR #182335)   Craig Topper via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [llvm] [RISCV] Add RISCVII::getTWidenOpNum. NFC (PR #182335)   via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Teresa Johnson via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Teresa Johnson via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [llvm] e87ac29 - [NFC][CodeGen] Refactor subregister index verification for MIR (#181921)   via llvm-commits
• [llvm] [NFC][CodeGen] Refactor subregister index verification for MIR (PR #181921)   Rahul Joshi via llvm-commits
• [llvm] 657eef6 - [ThinLTO] Distinguish symbols that are promoted (#181946)   via llvm-commits
• [llvm] [ThinLTO] Distinguish symbols that are promoted (PR #181946)   Mircea Trofin via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Krzysztof Drewniak via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Florian Hahn via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Krzysztof Drewniak via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] aa2dac4 - [DAG] SimplifyDemandedBits - fold FSHR(X,Y,Amt) -> SRL(Y,Amt) (#182294)   via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Simon Pilgrim via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] d5b6b46 - [emacs] Rework tablegen mode (#182076)   via llvm-commits
• [llvm] [emacs] Rework tablegen mode (PR #182076)   Krzysztof Drewniak via llvm-commits
• [llvm] [NFC][CodeGen] Rewrite comment for `getSubRegisterClass` (PR #182339)   Rahul Joshi via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Henrik G. Olsson via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [NFC][CodeGen] Rewrite comment for `getSubRegisterClass` (PR #182339)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Rewrite comment for `getSubRegisterClass` (PR #182339)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Rewrite comment for `getSubRegisterClass` (PR #182339)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Rewrite comment for `getSubRegisterClass` (PR #182339)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Use range-based for loops in KD reserved bytes checks (PR #182340)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][NFC] Use range-based for loops in KD reserved bytes checks (PR #182340)   via llvm-commits
• [llvm] [DirectX] Mark `dx.resource.getpointer` as convergent (PR #182099)   Finn Plummer via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Use range-based for loops in KD reserved bytes checks (PR #182340)   Matt Arsenault via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (PR #180888)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][CodeGen] Rewrite comment for `getSubRegisterClass` (PR #182339)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/Docs: Reserve 0x060 and 0x070 ELF MACH (e_flags) (PR #182341)   Konstantin Zhuravlyov via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Snehasish Kumar via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Snehasish Kumar via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Snehasish Kumar via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Snehasish Kumar via llvm-commits
• [llvm] AMDGPU/Docs: Reserve 0x060 and 0x070 ELF MACH (e_flags) (PR #182341)   via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Snehasish Kumar via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Paul Kirth via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Alexey Karyakin via llvm-commits
• [llvm] AMDGPU/Docs: Reserve 0x060 and 0x070 ELF MACH (e_flags) (PR #182341)   Shilei Tian via llvm-commits
• [llvm] [NFC][SPIRV] Replace uses of `removeFromParent` by `eraseFromParent` (PR #182330)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] ea4bbfb - AMDGPU/Docs: Reserve 0x060 and 0x070 ELF MACH (e_flags) (#182341)   via llvm-commits
• [llvm] AMDGPU/Docs: Reserve 0x060 and 0x070 ELF MACH (e_flags) (PR #182341)   Konstantin Zhuravlyov via llvm-commits
• [clang] [llvm] Revert "[clang][DebugInfo] Add virtuality call-site target informatio… (PR #182343)   Paul Kirth via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   via llvm-commits
• [clang] [llvm] Revert "[clang][DebugInfo] Add virtuality call-site target informatio… (PR #182343)   via llvm-commits
• [clang] [llvm] Revert "[clang][DebugInfo] Add virtuality call-site target informatio… (PR #182343)   via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   via llvm-commits
• [clang] [llvm] Revert "[clang][DebugInfo] Add virtuality call-site target informatio… (PR #182343)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Matt Arsenault via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Alexey Karyakin via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   Abhina Sree via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   via llvm-commits
• [llvm] [VPlan] Allow tail folding with IVs with outside users (PR #182322)   Andrei Elovikov via llvm-commits
• [llvm] ed0ba3c - [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (#181999)   via llvm-commits
• [llvm] [AMDGPU] Align loop headers to prevent instruction fetch split on GFX950 (PR #181999)   via llvm-commits
• [llvm] [AArch64][MachineOutliner] Clear debug locations on bundled instructions (PR #175655)   David Tellenbach via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] 92cc4ff - [PowerPC] Refactor immediate operand definitions (#179983)   via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   Lei Huang via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Matt Arsenault via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Matt Arsenault via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Krzysztof Parzyszek via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Derek Schuff via llvm-commits
• [llvm] [VPlan] Allow tail folding with IVs with outside users (PR #182322)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Allow tail folding with IVs with outside users (PR #182322)   Andrei Elovikov via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] TargetLowering: Replace android triple check with libcall check (PR #148800)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DirectX] Mark `dx.resource.getpointer` as convergent (PR #182099)   Deric C. via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand part 2 (PR #180289)   Lei Huang via llvm-commits
• [llvm] [LoopUnrollPass] Remove redundant debug message in `tryToUnrollLoop()` (PR #181954)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Remove redundant debug message in `tryToUnrollLoop()` (PR #181954)   Justin Fargnoli via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   Kai Nacke via llvm-commits
• [llvm] [LoopUnrollPass] Use `PragmaCount` instead of reparsing the metadata (NFC) (PR #182080)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Use `PragmaCount` instead of reparsing the metadata (NFC) (PR #182080)   via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   Abhina Sree via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] [SystemZ][z/OS] Add a parameter Align to emitIncrement() and use 32 for XPLINK stack on z/OS. (PR #182348)   via llvm-commits
• [llvm] [SystemZ][z/OS] Add a parameter Align to emitIncrement() and use 32 for XPLINK stack on z/OS. (PR #182348)   via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Krzysztof Parzyszek via llvm-commits
• [llvm] [SystemZ][z/OS] Add a parameter Align to emitIncrement() and use 32 for XPLINK stack on z/OS. (PR #182348)   via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [llvm] [RISCV] Use FSHR in LowerShiftRightParts for P extension on RV64. (PR #181234)   Sam Elliott via llvm-commits
• [llvm] [MC] Support specifying unwind handler in Masm proc directive (PR #181152)   via llvm-commits
• [llvm] [MC] Support specifying unwind handler in Masm proc directive (PR #181152)   via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Rahul Joshi via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [NFC][CodeGen] Rewrite comment for `getSubRegisterClass` (PR #182339)   Rahul Joshi via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [llvm] [MC] Support specifying unwind handler in Masm proc directive (PR #181152)   via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand part 2 (PR #180289)   Lei Huang via llvm-commits
• [llvm] [NFC][CodeGen] Add helper function to check SubReg validity (PR #181489)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Farzon Lotfi via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [llvm] [MC] Support specifying unwind handler in Masm proc directive (PR #181152)   via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   Christopher Ferris via llvm-commits
• [llvm] [IndVarSimplify] Kept additional nuw and nsw flags during LinearFunctionTestReplace (PR #177433)   via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Farzon Lotfi via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [llvm] [SystemZ][z/OS] Add support of expandLoadStackGuard on z/OS (PR #182355)   via llvm-commits
• [llvm] [SystemZ][z/OS] Add support of expandLoadStackGuard on z/OS (PR #182355)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [LoopUnrollPass] Use `PragmaCount` instead of reparsing the metadata (NFC) (PR #182080)   Kevin McAfee via llvm-commits
• [llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (PR #182358)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)   Domenic Nutile via llvm-commits
• [llvm] ea27498 - [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (#181047)   via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Matt Arsenault via llvm-commits
• [llvm] [bazel] Fix build for 8e85a42d5b (PR #182359)   Jackson Stogel via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Slava Zakharin via llvm-commits
• [llvm] [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (PR #182358)   via llvm-commits
• [llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)   via llvm-commits
• [llvm] 413cafa - [LoopUnrollPass] Remove redundant debug message in `tryToUnrollLoop()` (#181954)   via llvm-commits
• [llvm] [LoopUnrollPass] Remove redundant debug message in `tryToUnrollLoop()` (PR #181954)   Justin Fargnoli via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)   via llvm-commits
• [llvm] [LoopUnrollPass] Use `PragmaCount` instead of reparsing the metadata (NFC) (PR #182080)   Aiden Grossman via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Alex MacLean via llvm-commits
• [llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)   Domenic Nutile via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Florian Hahn via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Florian Hahn via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (PR #182358)   Matt Arsenault via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [llvm] [mailmap] Map quicinc.com addresses to qti.qualcomm.com/oss.qualcomm.com; fix sort order (PR #181426)   Usman Nadeem via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Luisa Cicolini via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Matt Arsenault via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Matt Arsenault via llvm-commits
• [llvm] 0dafeb9 - [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (#181640)   via llvm-commits
• [llvm] [GIsel] import `(not (add X, -1)) -> (neg X)` to GlobalISel (PR #181640)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Demetrius Kanios via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Alexey Karyakin via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (PR #181283)   Minsoo Choo via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [clang] [llvm] Revert "[clang][DebugInfo] Add virtuality call-site target informatio… (PR #182343)   Paul Kirth via llvm-commits
• [llvm] [NFC] [HWAsan] Run UTC on hwasan tests (PR #181437)   Florian Mayer via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Alexey Karyakin via llvm-commits
• [llvm] [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (PR #182358)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (PR #182358)   Changpeng Fang via llvm-commits
• [llvm] [RISCV] Use FSHR in LowerShiftRightParts for P extension on RV64. (PR #181234)   Craig Topper via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Florian Hahn via llvm-commits
• [llvm] dcd2b08 - [RISCV] Use FSHR in LowerShiftRightParts for P extension on RV64. (#181234)   via llvm-commits
• [llvm] [RISCV] Use FSHR in LowerShiftRightParts for P extension on RV64. (PR #181234)   Craig Topper via llvm-commits
• [llvm] [NFC][SPIRV] Replace uses of `removeFromParent` by `eraseFromParent` (PR #182330)   Steven Perron via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Matt Arsenault via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Matt Arsenault via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   Sadaf Ebrahimi via llvm-commits
• [llvm] [RFC][BPF] Relax BTF_TYPE_ID_REMOTE_RELOC for unnamed types (PR #182370)   via llvm-commits
• [llvm] [RFC][BPF] Relax BTF_TYPE_ID_REMOTE_RELOC for unnamed types (PR #182370)   via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Drew Kersnar via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [llvm] [bazel] Fix build for 8e85a42d5b (PR #182359)   Jackson Stogel via llvm-commits
• [llvm] [bazel] Fix build for 8e85a42d5b (PR #182359)   Jackson Stogel via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sam Elliott via llvm-commits
• [llvm] [TableGen][ISel] Add OPC_CheckTypeByHwMode0 to optimize the most frequent HwMode index. (PR #182366)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly] Fix getOrCreateFunctionTableSymbol() when __indirect_function_table declared (PR #182026)   Derek Schuff via llvm-commits
• [llvm] [bazel][mlir] Fix bazel for a8f2e80d5f (PR #182372)   Jackson Stogel via llvm-commits
• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Refactor `determineCalleeSaves`. (PR #166763)   Mikhail Gudim via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [clang] [llvm] [SYCL][Driver] Fix #174877 test to be driver-path-agnostic. (PR #182130)   via llvm-commits
• [llvm] [TableGen][ISel] Add OPC_CheckTypeByHwMode0 to optimize the most frequent getValueTypeForHwMode index. (PR #182366)   Craig Topper via llvm-commits
• [llvm] [VPlan] Support plain CFG plans in the verifier. (PR #181817)   Florian Hahn via llvm-commits
• [llvm] [TableGen][ISel] Add OPC_CheckTypeByHwMode0 to optimize the most frequent getValueTypeForHwMode index. (PR #182366)   Sam Elliott via llvm-commits
• [llvm] [TableGen][ISel] Add OPC_CheckTypeByHwMode0 to optimize the most frequent getValueTypeForHwMode index. (PR #182366)   Craig Topper via llvm-commits
• [llvm] 6233c4e - gn build: Port 15488a7f78ce   Peter Collingbourne via llvm-commits
• [llvm] [LV] Only create partial reductions when profitable. (PR #181706)   Florian Hahn via llvm-commits
• [llvm] [TailDup] Allow taildup into predecessor with EH successor (PR #182225)   Henry Jiang via llvm-commits
• [llvm] 5462443 - [SPIRV] Mark function only used in assert maybe_unused   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #182028)   Florian Mayer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #182028)   Florian Mayer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #182028)   Florian Mayer via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [clang] [llvm] [LFI] Add MCLFIRewriter infrastructure (PR #172906)   Zachary Yedidia via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Drew Kersnar via llvm-commits
• [llvm] [llvm][Verifier] Accept both unroll.full and unroll.enable metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [llvm][Verifier] Accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Drew Kersnar via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmax family to header-only (PR #182165)   Mohamed Emad via llvm-commits
• [clang] [llvm] [LFI] Add MCLFIRewriter infrastructure (PR #172906)   Zachary Yedidia via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math] Refactor ceil family to header-only (PR #182121)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [llvm] [llvm][Verifier] Ensure we accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [llvm][Verifier] Ensure we accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [CMake] Re-enable LIBCXX_HARDENING_MODE for assert build (PR #182383)   Steven Wu via llvm-commits
• [libc] [llvm] [libc][math] Refactor ceil family to header-only (PR #182121)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `bf16fmaf128` to header-only (PR #182009)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor `bf16fmaf128` to header-only (PR #182009)   Muhammad Bassiouni via llvm-commits
• [llvm] 7513fbd - [LV] Add tests with predicated early exits.   Florian Hahn via llvm-commits
• [llvm] [Hexagon] Add :mem_noshuf for store-load pairs with no scheduler Order dep (PR #181456)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Add :mem_noshuf for store-load pairs with no scheduler Order dep (PR #181456)   Brian Cain via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [GVN] Restore the NumGVNInstr metric (PR #182380)   Alan Zhao via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [clang] [llvm] [cmake] Add config for riscv(32|64)-unknown-elf (PR #176353)   Sam Elliott via llvm-commits
• [clang] [llvm] AMDGPU: Add builtin/intrinsic global_(load|store)_b128 (PR #172090)   Chinmay Deshpande via llvm-commits
• [llvm] [llvm][Verifier] Ensure we accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [GVN] Restore the NumGVNInstr metric (PR #182380)   Alan Zhao via llvm-commits
• [llvm] [WebAssembly] Allow use of the common FixIrreducible pass (PR #182384)   Derek Schuff via llvm-commits
• [llvm] [llvm][Verifier] Ensure we accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmax family to header-only (PR #182165)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmax family to header-only (PR #182165)   Mohamed Emad via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [llvm] Improve LLVM-C tests (PR #182379)   Duncan Ogilvie via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [llvm] 384bc40 - [TableGen][ISel] Add OPC_CheckTypeByHwMode0 to optimize the most frequent getValueTypeForHwMode index. (#182366)   via llvm-commits
• [llvm] [TableGen][ISel] Add OPC_CheckTypeByHwMode0 to optimize the most frequent getValueTypeForHwMode index. (PR #182366)   Craig Topper via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Drew Kersnar via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Paul Kirth via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Muhammad Bassiouni via llvm-commits
• [llvm] [CMake] Re-enable LIBCXX_HARDENING_MODE for assert build (PR #182383)   Argyrios Kyrtzidis via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Craig Topper via llvm-commits
• [llvm] [llvm][Verifier] Ensure we accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [llvm][Verifier] Ensure we accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fadd family to header-only (PR #182185)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fadd family to header-only (PR #182185)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fadd family to header-only (PR #182185)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Jan Svoboda via llvm-commits
• [llvm] [TargetLowering][RISCV] Don't use ISD::MUL in expandCLMUL if it would generate a library call. (PR #182389)   Craig Topper via llvm-commits
• [llvm] [Hexagon] Fix UB from left shift of negative in SelectSHL (PR #181235)   Ankit Aggarwal via llvm-commits
• [llvm] [NFC][MC] Add LLVM_ABI annotations to createAsmParser functions (PR #182393)   Zachary Yedidia via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16sub family to header-only (PR #182115)   Mohamed Emad via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Jonas Devlieghere via llvm-commits
• [llvm] [NFC][MC] Add LLVM_ABI annotations to createAsmParser functions (PR #182393)   via llvm-commits
• [llvm] [NFC][MC] Add LLVM_ABI annotations to createAsmParser functions (PR #182393)   Zachary Yedidia via llvm-commits
• [llvm] [Hexagon] Handle truncating COPY from DoubleRegs to IntRegs (PR #181360)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Alexey Karyakin via llvm-commits
• [llvm] [SandboxIR][Region] Replace exit() with reportFatalUsageError() (PR #182134)   Jorge Gorbe Moya via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [llvm] Improve LLVM-C tests (PR #182379)   via llvm-commits
• [llvm] [Hexagon] Handle truncating COPY from DoubleRegs to IntRegs (PR #181360)   Brian Cain via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   via llvm-commits
• [llvm] [Hexagon] Handle subreg copies between DoubleRegs and IntRegs (PR #181360)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix UB from signed left shift overflow in evaluateEXTRACTi (PR #181243)   Ankit Aggarwal via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [BPF] Relax BTF_TYPE_ID_REMOTE_RELOC for unnamed types (PR #182370)   via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   via llvm-commits
• [llvm] [TargetLowering][RISCV] Don't use ISD::MUL in expandCLMUL if it would generate a library call. (PR #182389)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   via llvm-commits
• [llvm] 696aa3c - [Hexagon] Fix UB from signed left shift overflow in evaluateEXTRACTi (#181243)   via llvm-commits
• [llvm] [Hexagon] Fix UB from signed left shift overflow in evaluateEXTRACTi (PR #181243)   Ankit Aggarwal via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [flang] [libc] [libclc] [lldb] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   Mohamed Emad via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Cyndy Ishida via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Cyndy Ishida via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Mohamed Emad via llvm-commits
• [llvm] Improve LLVM-C tests (PR #182379)   via llvm-commits
• [llvm] 13f659c - [ARM] Fix duplicate RUN lines in tests (#182280)   via llvm-commits
• [llvm] [ARM] Fix duplicate RUN lines in tests (PR #182280)   Jay Foad via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Mohamed Emad via llvm-commits
• [llvm] [GVN] Restore the NumGVNInstr metric (PR #182380)   Alan Zhao via llvm-commits
• [llvm] [GVN] Restore the NumGVNInstr metric (PR #182380)   Alan Zhao via llvm-commits
• [libc] [llvm] [libc][math] Refactor `bf16fmaf128` to header-only (PR #182009)   Mohamed Emad via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Bill Wendling via llvm-commits
• [libc] [llvm] [libc][math] Refactor fadd family to header-only (PR #182185)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fadd family to header-only (PR #182185)   Mohamed Emad via llvm-commits
• [clang] [llvm] [cmake] Add config for riscv(32|64)-unknown-elf (PR #176353)   Petr Hosek via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Jan Svoboda via llvm-commits
• [clang] [llvm] [cmake] Add config for riscv(32|64)-unknown-elf (PR #176353)   Petr Hosek via llvm-commits
• [clang] [llvm] [cmake] Add config for riscv(32|64)-unknown-elf (PR #176353)   Petr Hosek via llvm-commits
• [clang] [llvm] [cmake] Add config for riscv(32|64)-unknown-elf (PR #176353)   Petr Hosek via llvm-commits
• [llvm] [ARM] Fix duplicate RUN lines in tests (PR #182280)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor fadd family to header-only (PR #182185)   Mohamed Emad via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Cyndy Ishida via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Jan Svoboda via llvm-commits
• [clang] [llvm] [analyzer] Remove the alpha.core.FixedAddr checker (PR #182033)   Ziqing Luo via llvm-commits
• [clang] [llvm] [analyzer] Remove the alpha.core.FixedAddr checker (PR #182033)   Ziqing Luo via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   via llvm-commits
• [clang] [llvm] [analyzer] Remove the alpha.core.FixedAddr checker (PR #182033)   Ziqing Luo via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Derek Schuff via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [llvm] [ValueTracking] Recognize non-negative subtraction patterns (PR #181964)   via llvm-commits
• [llvm] [ProfCheck] Disable more passes not used in CPU pipelines (PR #182414)   Aiden Grossman via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Jessica Clarke via llvm-commits
• [llvm] [AArch64] Fix handling of x29/x30 in inline assembly clobbers (PR #167783)   Alex Rønne Petersen via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Derek Schuff via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   via llvm-commits
• [llvm] TargetLowering: Replace android triple check with libcall check (PR #148800)   Eli Friedman via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Cyndy Ishida via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [ProfCheck] Disable more passes not used in CPU pipelines (PR #182414)   Alan Zhao via llvm-commits
• [llvm] 4d3217d - [Hexagon] Fix SplitVectors crash in HVX type legalization (#181377)   via llvm-commits
• [llvm] [ProfCheck] Disable more passes not used in CPU pipelines (PR #182414)   Aiden Grossman via llvm-commits
• [llvm] fdb1594 - [ProfCheck] Disable more passes not used in CPU pipelines (#182414)   via llvm-commits
• [llvm] [ProfCheck] Disable more passes not used in CPU pipelines (PR #182414)   Aiden Grossman via llvm-commits
• [llvm] 2e989bd - [InferAS] Infer the address space of inttoptr (#173244)   via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] Improve LLVM-C tests (PR #182379)   Stefan Weigl-Bosker via llvm-commits
• [lld] LLD is unable to link musl for x32 - only for DSOs. static linking wa… (PR #182419)   via llvm-commits
• [lld] LLD is unable to link musl for x32 - only for DSOs. static linking wa… (PR #182419)   via llvm-commits
• [lld] LLD is unable to link musl for x32 - only for DSOs. static linking wa… (PR #182419)   via llvm-commits
• [lld] LLD is unable to link musl for x32 - only for DSOs. static linking wa… (PR #182419)   via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Sam Elliott via llvm-commits
• [llvm] [mailmap] Map quicinc.com addresses to qti.qualcomm.com/oss.qualcomm.com; fix sort order (PR #181426)   Brian Cain via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add RISCVII::getTWidenOpNum. NFC (PR #182335)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add RISCVII::getTWidenOpNum. NFC (PR #182335)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add RISCVII::getTWidenOpNum. NFC (PR #182335)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Fold shxadd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   via llvm-commits
• [llvm] [LoopUnroll] Enhance the use of Optimization Remarks and `LLVM_DEBUG` (PR #178476)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Enhance the use of Optimization Remarks and `LLVM_DEBUG` (PR #178476)   Justin Fargnoli via llvm-commits
• [llvm] [llvm][Verifier] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] cfc3104 - [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (#182358)   via llvm-commits
• [llvm] [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (PR #182358)   Changpeng Fang via llvm-commits
• [llvm] [SPIRV] Fix printf regression after #178980 (PR #182423)   Sang Ik Lee via llvm-commits
• [llvm] [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (PR #182358)   Changpeng Fang via llvm-commits
• [llvm] [SPIRV] Fix printf regression after #178980 (PR #182423)   via llvm-commits
• [llvm] [BPF] Relax BTF_TYPE_ID_REMOTE_RELOC for unnamed types (PR #182370)   via llvm-commits
• [llvm] [AMDGPU] Add negative tests for register aignment for tensor load/store, NFC (PR #182358)   Shilei Tian via llvm-commits
• [llvm] [BPF] Relax BTF_TYPE_ID_REMOTE_RELOC for unnamed types (PR #182370)   via llvm-commits
• [llvm] [mailmap] Map quicinc.com addresses to qti.qualcomm.com/oss.qualcomm.com; fix sort order (PR #181426)   Venkata Ramanaiah Nalamothu via llvm-commits
• [llvm] [OFFLOAD] Add data fence API for libomptarget migration (PR #172223)   via llvm-commits
• [llvm] [OFFLOAD] Add data fence API for libomptarget migration (PR #172223)   via llvm-commits
• [llvm] [LoopUnrollPass] Only emit shouldPartialUnroll() missed optimization remark when the user requested full unrolling (PR #182351)   Justin Fargnoli via llvm-commits
• [llvm] [SPIRV] Fix printf regression after #178980 (PR #182423)   via llvm-commits
• [llvm] [llvm][Verifier] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Aiden Grossman via llvm-commits
• [llvm] [llvm][Verifier] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Aiden Grossman via llvm-commits
• [llvm] [llvm][Verifier] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (PR #182381)   Aiden Grossman via llvm-commits
• [llvm] [NFC] [HWASan] Add test for double lifetime (PR #182424)   Florian Mayer via llvm-commits
• [llvm] [NFC] [HWASan] Add test for double lifetime (PR #182424)   Florian Mayer via llvm-commits
• [llvm] 2ef1759 - [NFC] [HWASan] Add test for double lifetime   via llvm-commits
• [llvm] [NFC] [HWASan] Add test for double lifetime (PR #182424)   Florian Mayer via llvm-commits
• [llvm] [NFC] [HWASan] Add test for double lifetime (PR #182424)   Florian Mayer via llvm-commits
• [llvm] [VPlan] Allow tail folding with IVs with outside users (PR #182322)   Luke Lau via llvm-commits
• [llvm] [LV] Allow tail folding with IVs with outside users (PR #182322)   Luke Lau via llvm-commits
• [llvm] [ARM] Treat strictfp vector rounding operations as legal (PR #180480)   Serge Pavlov via llvm-commits
• [llvm] [ARM] Treat strictfp vector rounding operations as legal (PR #180480)   Serge Pavlov via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Heejin Ahn via llvm-commits
• [llvm] [NFC][MC] Add LLVM_ABI annotations to createAsmParser functions (PR #182393)   Sharjeel Khan via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread local register on Arm Linux (PR #182438)   Igor Kudrin via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread local register on Arm Linux (PR #182438)   via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
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• [lldb] [llvm] [lldb][ARM] Support thread local variables on ARM Linux (PR #181315)   Igor Kudrin via llvm-commits
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• [llvm] Improve LLVM-C tests (PR #182379)   Julius Alexandre via llvm-commits
• [llvm] [RISCV] Separate VMConstraint from RVVConstraint. NFC (PR #182089)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
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• [llvm] [NFC][MC] Add LLVM_ABI annotations to createAsmParser functions (PR #182393)   Alexis Engelke via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
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• [llvm] [ARM] Treat strictfp vector rounding operations as legal (PR #180480)   Serge Pavlov via llvm-commits
• [llvm] [AMDGPU][NFC] Use range-based for loops in KD reserved bytes checks (PR #182340)   Son Tuan Vu via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support thread local variables on ARM Linux (PR #181315)   Igor Kudrin via llvm-commits
• [llvm] [AMDGPU][NFC] Use range-based for loops in KD reserved bytes checks (PR #182340)   Shilei Tian via llvm-commits
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• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Auto generates checks for gfx1250_asm_vimage_err.s, NFC (PR #182441)   Changpeng Fang via llvm-commits
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• [llvm] [RISCV] Separate VMConstraint from RVVConstraint. NFC (PR #182089)   Craig Topper via llvm-commits
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• [llvm] [AMDGPU] Auto generates checks for gfx1250_asm_vimage_err.s, NFC (PR #182441)   Changpeng Fang via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   via llvm-commits
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• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Ryan Buchner via llvm-commits
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• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
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• [llvm] [AMDGPU] Lower i8/i16 (and (srl x, c), mask) to v_bfe_u32 (PR #182446)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Ryan Buchner via llvm-commits
• [llvm] [AMDGPU] Lower i8/i16 (and (srl x, c), mask) to v_bfe_u32 (PR #182446)   via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Ryan Buchner via llvm-commits
• [llvm] [AMDGPU] Lower i8/i16 (and (srl x, c), mask) to v_bfe_u32 (PR #182446)   via llvm-commits
• [llvm] [AMDGPU] Lower i8/i16 (and (srl x, c), mask) to v_bfe_u32 (PR #182446)   Vigneshwar Jayakumar via llvm-commits
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• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
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• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Luke Lau via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   via llvm-commits
• [llvm] [AsmParser] Fix unchecked return value in AsmParser::parseIdentifier (PR #182448)   Jaydeep Chauhan via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add RISCVII::getTWidenOpNum. NFC (PR #182335)   Pengcheng Wang via llvm-commits
• [llvm] [AsmParser] Fix unchecked return value in AsmParser::parseIdentifier (PR #182448)   via llvm-commits
• [llvm] [NFC][AsmParser] Fix unchecked return value in AsmParser::parseIdentifier (PR #182448)   Jaydeep Chauhan via llvm-commits
• [llvm] [AMDGPU] Auto generates checks for gfx1250_asm_vimage_err.s, NFC (PR #182441)   LLVM Continuous Integration via llvm-commits
• [llvm] [WIP][AMDGPU] Coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
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• [llvm] AMDGPU coverity fixes (PR #182013)   via llvm-commits
• [llvm] [NFC][AsmParser] Fix unchecked return value in AsmParser::parseIdentifier (PR #182448)   Fangrui Song via llvm-commits
• [llvm] [Maintainers] Fix broken clang link (NFC) (PR #182451)   Cullen Rhodes via llvm-commits
• [llvm] [NFC][AsmParser] Fix unchecked return value in AsmParser::parseIdentifier (PR #182448)   Jaydeep Chauhan via llvm-commits
• [llvm] [llvm] Delete `codegen-plugin-loading.ll` test (PR #182453)   Jonas Hahnfeld via llvm-commits
• [llvm] [NFC][AsmParser] Fix unchecked return value in AsmParser::parseIdentifier (PR #182448)   Jaydeep Chauhan via llvm-commits
• [clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)   Jonas Hahnfeld via llvm-commits
• [llvm] [llvm] Delete `codegen-plugin-loading.ll` test (PR #182453)   Alexis Engelke via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Gaëtan Bossu via llvm-commits
• [llvm] [X86][GISEL] - Legalize G_FPTOUI & G_UITOFP for X87 (PR #155562)   Pawan Nirpal via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Matt Arsenault via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Matt Arsenault via llvm-commits
• [llvm] [LoopUnroll][NFC] Record conditional latch info (PR #182403)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] c1d25df - [ValueTracking] Fix crash in PR175590 (#180355)   via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] IR: Add prefalign attribute for function definitions. (PR #155527)   Matt Arsenault via llvm-commits
• [llvm] IR: Add prefalign attribute for function definitions. (PR #155527)   Matt Arsenault via llvm-commits
• [llvm] IR: Add prefalign attribute for function definitions. (PR #155527)   Matt Arsenault via llvm-commits
• [llvm] IR: Add prefalign attribute for function definitions. (PR #155527)   Matt Arsenault via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Heejin Ahn via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] [AMDGPU] Add VOPC to gfx13 (PR #182293)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Durgadoss R via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Benjamin Maxwell via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Durgadoss R via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Durgadoss R via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Kirill Vedernikov via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Matt Arsenault via llvm-commits
• [llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)   Durgadoss R via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_AMDGPU_BUFFER_ATOMIC_FADD (PR #175258)   Anshil Gandhi via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   Durgadoss R via llvm-commits
• [llvm] [NFC][SPIRV] Replace uses of `removeFromParent` by `eraseFromParent` (PR #182330)   Manuel Carrasco via llvm-commits
• [llvm] e411619 - tools: Restore PluginLoader to llc (#182455)   via llvm-commits
• [llvm] tools: Restore PluginLoader to llc (PR #182455)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)   Matt Arsenault via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Kirill Vedernikov via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Durgadoss R via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Durgadoss R via llvm-commits
• [llvm] [DSE] Add variant of conditions implying value established by all predecessors (PR #181615)   Antonio Frighetto via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_AMDGPU_BUFFER_ATOMIC_FADD (PR #175258)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   Matt Arsenault via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Sander de Smalen via llvm-commits
• [llvm] [InstCombine] Decompose icmp over min/max intrinsics when compared with a constant (PR #182461)   via llvm-commits
• [llvm] [llvm] Delete `codegen-plugin-loading.ll` test (PR #182453)   Jonas Hahnfeld via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Tatham via llvm-commits
• [llvm] [InstCombine] Decompose icmp over min/max intrinsics when compared with a constant (PR #182461)   Nathiyaa Sengodan via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [RFC][Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Pankaj Dwivedi via llvm-commits
• [llvm] [AArch64] Mark X16 as clobbered in PAUTH_EPILOGUE for hint-based PAuthLR (PR #175991)   Victor Campos via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [llvm] Delete `codegen-plugin-loading.ll` test (PR #182453)   Stefan Gränitz via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [clang] [llvm] [LFI] Add MCLFIRewriter infrastructure (PR #172906)   Nikita Popov via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [InstCombine] Decompose icmp over min/max intrinsics when compared with a constant (PR #182461)   Nathiyaa Sengodan via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Matt Arsenault via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Matt Arsenault via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Sander de Smalen via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Matt Arsenault via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Matt Arsenault via llvm-commits
• [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [GlobalISel] Add `sub(-1, x) -> (xor x, -1)` from SelectionDAG (PR #181014)   Matt Arsenault via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [compiler-rt] [ASan] Fix test IsPoisonedDoesNotCrashOnMemoryBoundaries for 32-bit targets (PR #182412)   Dan Blackwell via llvm-commits
• [llvm] [AMDGPU][NFC] Use range-based for loops in KD reserved bytes checks (PR #182340)   Jay Foad via llvm-commits
• [compiler-rt] [ASan] Fix test IsPoisonedDoesNotCrashOnMemoryBoundaries for 32-bit targets (PR #182412)   Dan Blackwell via llvm-commits
• [compiler-rt] 009068e - [ASan] Fix test IsPoisonedDoesNotCrashOnMemoryBoundaries for 32-bit targets (#182412)   via llvm-commits
• [compiler-rt] [ASan] Fix test IsPoisonedDoesNotCrashOnMemoryBoundaries for 32-bit targets (PR #182412)   Dan Blackwell via llvm-commits
• [llvm] [SelectionDAG] Fix bug related to demanded bits/elts for BITCAST (PR #145902)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ][z/OS] Add support of expandLoadStackGuard on z/OS (PR #182355)   Ulrich Weigand via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Matt Arsenault via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Mikael Holmen via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Matt Arsenault via llvm-commits
• [llvm] 351a1bb - [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (#181899)   via llvm-commits
• [llvm] [InstCombine] Do not perform fcmp -> icmp transformation if denormal inputs may be flushed (PR #181899)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add clmul/h/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] [AArch64] Add clmuh/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add clmuh/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #182028)   via llvm-commits
• [clang] [compiler-rt] [llvm] [TySan] User-friendly (C style) pointer type names for error reports (PR #166381)   Matthew Nagy via llvm-commits
• [clang] [llvm] [analyzer] Remove the alpha.core.FixedAddr checker (PR #182033)   Balázs Benics via llvm-commits
• [clang] [llvm] [analyzer] Remove the alpha.core.FixedAddr checker (PR #182033)   Balázs Benics via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Matt Arsenault via llvm-commits
• [llvm] 8715094 - [analyzer] Remove the alpha.core.FixedAddr checker (#182033)   via llvm-commits
• [clang] [llvm] [analyzer] Remove the alpha.core.FixedAddr checker (PR #182033)   Balázs Benics via llvm-commits
• [llvm] [LoopUnroll] Support parallel reductions for minmax (PR #182473)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopUnroll] Support parallel reductions for minmax (PR #182473)   via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   via llvm-commits
• [llvm] [X86][GlobalISel] Support globals in pic mode (PR #170038)   Matt Arsenault via llvm-commits
• [llvm] 30cd3d5 - [NFC][SPIRV] Replace uses of `removeFromParent` by `eraseFromParent` (#182330)   via llvm-commits
• [llvm] [NFC][SPIRV] Replace uses of `removeFromParent` by `eraseFromParent` (PR #182330)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LV] Only create partial reductions when profitable. (PR #181706)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole when lower 32 bits are masked away (PR #181238)   Matt Arsenault via llvm-commits
• [llvm] b82c7fc - [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (#176420)   via llvm-commits
• [polly] b82c7fc - [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (#176420)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Petar Avramovic via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Petar Avramovic via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   David Sherwood via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   David Sherwood via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   David Sherwood via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   David Sherwood via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Jay Foad via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Jay Foad via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Asher Dobrescu via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole when lower 32 bits are masked away (PR #181238)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole when lower 32 bits are masked away (PR #181238)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole when lower 32 bits are masked away (PR #181238)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (PR #182107)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_AMDGPU_BUFFER_ATOMIC_FADD (PR #175258)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (PR #182107)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   David Spickett via llvm-commits
• [clang] [llvm] AMDGPU: Add builtin/intrinsic global_(load|store)_b128 (PR #172090)   Matt Arsenault via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - fold FSHR(X, Y, Amt) -> SRL(Y, Amt) (PR #182294)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add VINTERP encoding to gfx13 (PR #182481)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VINTERP encoding to gfx13 (PR #182481)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [compiler-rt] halt_on_error flag for TySan and docs (PR #182479)   Matthew Nagy via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Add target features to guard DPP controls (PR #182391)   Jay Foad via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Alexey Bataev via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread local register on Arm Linux (PR #182438)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread local register on Arm Linux (PR #182438)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread local register on Arm Linux (PR #182438)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread local register on Arm Linux (PR #182438)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread local register on Arm Linux (PR #182438)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support thread local variables on ARM Linux (PR #181315)   David Spickett via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole when lower 32 bits are masked away (PR #181238)   Jay Foad via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   David Sherwood via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   David Sherwood via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   David Sherwood via llvm-commits
• [llvm] [TySan] Fix crash in instrumentation with scalar TBAA tag missing offset (PR #172878)   Benjamin Stott via llvm-commits
• [llvm] [TableGen] fix unreachable code warning in *GenSubtargetInfo.inc files (PR #182477)   Jay Foad via llvm-commits
• [llvm] 163ff50 - Revert "[ValueTracking] Fix crash in PR175590" (#182478)   via llvm-commits
• [llvm] Revert "[ValueTracking] Fix crash in PR175590" (PR #182478)   Hans Wennborg via llvm-commits
• [llvm] cfdacce - [NFC] Re-enable MSVC C4611 diagnostic (#182100)   via llvm-commits
• [llvm] [NFC] Re-enable MSVC C4611 diagnostic (PR #182100)   Aaron Ballman via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Evgenii Kudriashov via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Evgenii Kudriashov via llvm-commits
• [llvm] [NFC] Re-enable MSVC C4611 diagnostic (PR #182100)   Aaron Ballman via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [TableGen] fix unreachable code warning in *GenSubtargetInfo.inc files (PR #182477)   Rafał Rudnicki via llvm-commits
• [llvm] [MC][WebAssembly] Fix importing tables with limits (PR #172992)   Hood Chatham via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] 5177439 - [SLP][NFC]Add a test with the incorrect ne/eq transform because of reused instructions   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Raphael Isemann via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Raphael Isemann via llvm-commits
• [llvm] Re-enable MSVC C4610 diagnostic; NFC (PR #182489)   Aaron Ballman via llvm-commits
• [llvm] [AArch64] Add basic scmp and ucmp costs. (PR #182180)   Hassnaa Hamdi via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   Ricardo Jesus via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Michael Kruse via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   Ricardo Jesus via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to addrecs wrap (NFC) (PR #179683)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] [AArch64] Add basic scmp and ucmp costs. (PR #182180)   Hassnaa Hamdi via llvm-commits
• [llvm] ac23bf6 - [LoopIdiomVectorize] Bail when vectorization is disabled (#181142)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   Osman Yasar via llvm-commits
• [llvm] e0f2b1b - [AMDGPU] Ensure all PERMLANE instructions are marked as convergent (#182162)   via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Krzysztof Parzyszek via llvm-commits
• [llvm] [AMDGPU] Ensure all PERMLANE instructions are marked as convergent (PR #182162)   via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   Osman Yasar via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [AMDGPU] Remove AMDGPUArgumentUsageInfo pass (PR #182490)   Dark Steve via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   Osman Yasar via llvm-commits
• [llvm] [AMDGPU] Remove AMDGPUArgumentUsageInfo pass (PR #182490)   via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [TableGen] fix unreachable code warning in *GenSubtargetInfo.inc files (PR #182477)   Jay Foad via llvm-commits
• [llvm] a2223c4 - [SystemZ][z/OS] Preserve filetag when rewriting files (#181733)   via llvm-commits
• [llvm] [SystemZ][z/OS] Preserve filetag when rewriting files (PR #181733)   Abhina Sree via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] Re-enable MSVC C4204 diagnostic; NFC (PR #182491)   Aaron Ballman via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   David Sherwood via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC] DWARFVerifier: use C-style array instead of brace-enclosed init list (PR #167328)   Andrei Golubev via llvm-commits
• [llvm] Re-enable MSVC C4204 diagnostic; NFC (PR #182491)   Hans Wennborg via llvm-commits
• [llvm] [NFC] Re-enable* MSVC C4503 diagnostic (PR #182049)   Aaron Ballman via llvm-commits
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• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
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• [llvm] Re-enable MSVC C4592 diagnostic; NFC (PR #182503)   Aaron Ballman via llvm-commits
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• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
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• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
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• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
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• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Mircea Trofin via llvm-commits
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• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [flang-rt] Add sysroot to test (PR #182508)   Tom Eccles via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   via llvm-commits
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• [llvm] [NFC] `clang-format` GenericDomTreeConstruction.h (PR #182509)   Mircea Trofin via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   via llvm-commits
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• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Aaron Ballman via llvm-commits
• [llvm] [NFC] `clang-format` GenericDomTreeConstruction.h (PR #182509)   Mircea Trofin via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [NFC] `clang-format` GenericDomTreeConstruction.h (PR #182509)   via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
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• [llvm] [NFC] `clang-format` GenericDomTreeConstruction.h (PR #182509)   Jakub Kuderski via llvm-commits
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• [llvm] [AMDGPU] Add target features to guard DPP controls (PR #182391)   via llvm-commits
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• [llvm] [AMDGPU] Add target features to guard DPP controls (PR #182391)   via llvm-commits
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• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Andrew Savonichev via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] acc15fb - [CMake][LLVM] Disable PCH on MSVC for file with custom flags   Alexis Engelke via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Asher Dobrescu via llvm-commits
• [llvm] [SPIRV] Fix printf regression after #178980 (PR #182423)   Nick Sarnie via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Petar Avramovic via llvm-commits
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• [llvm] [SPIRV] Fix printf regression after #178980 (PR #182423)   Nick Sarnie via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   Carlos Alberto Enciso via llvm-commits
• [llvm] [Support][NFC] Avoid weak vtable warning for JSON ParseError (PR #182511)   Alexis Engelke via llvm-commits
• [llvm] [Support][NFC] Avoid weak vtable warning for JSON ParseError (PR #182511)   Alexis Engelke via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   via llvm-commits
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• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   via llvm-commits
• [llvm] [Support][NFC] Avoid weak vtable warning for JSON ParseError (PR #182511)   Jakub Kuderski via llvm-commits
• [llvm] [AMDGPU] Add VOPC to gfx13 (PR #182293)   Brox Chen via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   Carlos Alberto Enciso via llvm-commits
• [llvm] [Support][NFC] Avoid weak vtable warning for JSON ParseError (PR #182511)   Alexis Engelke via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR180355 (PR #182512)   Kshitij Paranjape via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   Carlos Alberto Enciso via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR180355 (PR #182512)   via llvm-commits
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• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Antonio Frighetto via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [libc] [llvm] [libc] Support array tags in the RPC dispatch helpers (PR #181395)   Joseph Huber via llvm-commits
• [llvm] [Support][NFC] Avoid weak vtable warning for JSON ParseError (PR #182511)   Jakub Kuderski via llvm-commits
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• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   Carlos Alberto Enciso via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
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• [llvm] [LV] Allow tail folding with IVs with outside users (PR #182322)   Luke Lau via llvm-commits
• [llvm] Re-enable MSVC C4091 diagnostic; NFC (PR #182500)   LLVM Continuous Integration via llvm-commits
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• [llvm] [cmake] Forward MacOS sysroot to runtimes when not crosscompiling (PR #182501)   Michael Kruse via llvm-commits
• [llvm] [cmake] Forward MacOS sysroot to runtimes when not crosscompiling (PR #182501)   Michael Kruse via llvm-commits
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• [llvm] Support non-constant `G_BUILD_VECTOR` (PR #182502)   via llvm-commits
• [llvm] b2eb876 - [AMDGPU][NFC] Use range-based for loops in KD reserved bytes checks (#182340)   via llvm-commits
• [llvm] [AMDGPU][NFC] Use range-based for loops in KD reserved bytes checks (PR #182340)   Son Tuan Vu via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Antonio Frighetto via llvm-commits
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• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Antonio Frighetto via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Antonio Frighetto via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Antonio Frighetto via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
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• [llvm] Support non-constant `G_BUILD_VECTOR` (PR #182502)   Simon Pilgrim via llvm-commits
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• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
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• [llvm] [LLVM][ValueTracking] Add vector ConstantInt/FP support to isBytewiseValue(). (PR #182519)   Paul Walker via llvm-commits
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• [llvm] [LLVM][ValueTracking] Add vector ConstantInt/FP support to isBytewiseValue(). (PR #182519)   via llvm-commits
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• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] 3f2c28e - [clang] Simplify usage of FileManager::makeAbsolutePath (#182360)   via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   Cyndy Ishida via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
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• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   via llvm-commits
• [llvm] [LV] Allow tail folding with IVs with outside users (PR #182322)   Andrei Elovikov via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Luke Lau via llvm-commits
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• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Luke Lau via llvm-commits
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• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] [VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (PR #181789)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread local register on Arm Linux (PR #182438)   Igor Kudrin via llvm-commits
• [llvm] Re-enable MSVC C5105 diagnostic; NFC (PR #182524)   Aaron Ballman via llvm-commits
• [llvm] [flang-rt] Add sysroot to test (PR #182508)   Tom Eccles via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Yingwei Zheng via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [llvm] [DA] Remove "minor algebra" in the RDIV test (PR #179654)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove "minor algebra" in the RDIV test (PR #179654)   Ryotaro Kasuga via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Razvan Lupusoru via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NFC] `clang-format` GenericDomTreeConstruction.h (PR #182509)   Mircea Trofin via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Slava Zakharin via llvm-commits
• [llvm] c6cb8f3 - [NFC] `clang-format` GenericDomTreeConstruction.h (#182509)   via llvm-commits
• [llvm] [NFC] `clang-format` GenericDomTreeConstruction.h (PR #182509)   Mircea Trofin via llvm-commits
• [llvm] [DTU] fix dominator tree update eliding reachable nodes (PR #177683)   Mircea Trofin via llvm-commits
• [llvm] [AMDGPU] Combine i8/i16 (and (srl x, c), mask) to v_bfe_u32 (PR #182446)   Vigneshwar Jayakumar via llvm-commits
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• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Osman Yasar via llvm-commits
• [llvm] [LLVM][MachinePipeliner] Fix crash during prolog peeling when loop preheader terminates with a fallthrough conditional branch (PR #182189)   Ryotaro Kasuga via llvm-commits
• [llvm] fa1cda8 - [DirectX] Mark `dx.resource.getpointer` as convergent (#182099)   via llvm-commits
• [llvm] [DirectX] Mark `dx.resource.getpointer` as convergent (PR #182099)   Finn Plummer via llvm-commits
• [llvm] Re-enable MSVC C4709 diagnostic; NFC (PR #182514)   Hans Wennborg via llvm-commits
• [llvm] [AMDGPU] Efficient way to get NumArchVGPRs. (PR #182537)   Sirish Pande via llvm-commits
• [llvm] [LLVM][ExecutionEngine] Add vector ConstantInt/FP support to getConstantValue(). (PR #182538)   Paul Walker via llvm-commits
• [llvm] Re-enable MSVC C5105 diagnostic; NFC (PR #182524)   Hans Wennborg via llvm-commits
• [llvm] [AMDGPU] Efficient way to get NumArchVGPRs. (PR #182537)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   Ricardo Jesus via llvm-commits
• [llvm] [PowerPC] Fix 32bit paddis implementation (PR #182525)   Amy Kwan via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] Re-enable MSVC C4592 diagnostic; NFC (PR #182503)   Hans Wennborg via llvm-commits
• [llvm] [AArch64] materialized neon reg with movi (PR #182540)   Congcong Cai via llvm-commits
• [llvm] [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (PR #180570)   Ricardo Jesus via llvm-commits
• [llvm] Re-enable MSVC C4592 diagnostic; NFC (PR #182503)   Aaron Ballman via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Ryotaro Kasuga via llvm-commits
• [llvm] 103cef9 - [flang][OpenMP] Initial support for DEPTH clause (#182288)   via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   Sadaf Ebrahimi via llvm-commits
• [llvm] [AArch64] materialized neon reg with movi (PR #182540)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Initial support for DEPTH clause (PR #182288)   Krzysztof Parzyszek via llvm-commits
• [llvm] c9c1b15 - Re-enable MSVC C4709 diagnostic; NFC (#182514)   via llvm-commits
• [llvm] Re-enable MSVC C4709 diagnostic; NFC (PR #182514)   Aaron Ballman via llvm-commits
• [llvm] b8fbf9e - Re-enable MSVC C5105 diagnostic; NFC (#182524)   via llvm-commits
• [llvm] Re-enable MSVC C5105 diagnostic; NFC (PR #182524)   Aaron Ballman via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Simon Tatham via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [llvm] Re-enable MSVC C4592 diagnostic; NFC (PR #182503)   Aaron Ballman via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   LLVM Continuous Integration via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   Osman Yasar via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Justin Fargnoli via llvm-commits
• [llvm] [GlobalISel] Add `sub(-1, x) -> (xor x, -1)` from SelectionDAG (PR #181014)   Osman Yasar via llvm-commits
• [llvm] [Maintainers] Fix broken clang link (NFC) (PR #182451)   Justin Fargnoli via llvm-commits
• [llvm] 6d95235 - [PowerPC] Fix 32bit paddis implementation (#182525)   via llvm-commits
• [llvm] [PowerPC] Fix 32bit paddis implementation (PR #182525)   Lei Huang via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Aiden Grossman via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Aiden Grossman via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Aiden Grossman via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Aiden Grossman via llvm-commits
• [llvm] [LLVM][NVPTX] Add vector ConstantInt/FP support to bufferAggregateConstant. (PR #182544)   Paul Walker via llvm-commits
• [llvm] [LLVM][NVPTX] Add vector ConstantInt/FP support to bufferAggregateConstant. (PR #182544)   via llvm-commits
• [llvm] [AMDGPU] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Frederick Vu via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Farzon Lotfi via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Simon Pilgrim via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Justin Fargnoli via llvm-commits
• [llvm] Revert "[X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1))" (PR #182545)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1))" (PR #182545)   Simon Pilgrim via llvm-commits
• [llvm] e01b867 - [DA] Remove "minor algebra" in the RDIV test (#179654)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   Aiden Grossman via llvm-commits
• [llvm] [DA] Remove "minor algebra" in the RDIV test (PR #179654)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   via llvm-commits
• [llvm] Revert "[X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1))" (PR #182545)   via llvm-commits
• [llvm] [UTC] Add utility script to deal with conflicting RUN lines (PR #182546)   Jameson Nash via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Aiden Grossman via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Aiden Grossman via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Aiden Grossman via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [llvm] [UTC] Add utility script to deal with conflicting RUN lines (PR #182546)   via llvm-commits
• [llvm] [X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (PR #182084)   Slava Zakharin via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Xavier Roche via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   via llvm-commits
• [llvm] [SimplifyCFG] remove misleading arrow operator (PR #182435)   Justin Fargnoli via llvm-commits
• [llvm] [SPIRV][NFC] Update tests to check `spirv-val` output (PR #182549)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [TableGen][RISCV] Avoid using operator< on bools in SearchableTable lookup functions. (PR #182553)   Craig Topper via llvm-commits
• [llvm] [TableGen][RISCV] Avoid using operator< on bools in SearchableTable lookup functions. (PR #182553)   via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] 1ea49c7 - [CMake] Disable PCH on AIX   Alexis Engelke via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Make validLookupTableConstant explicitly reject vector types. (PR #182555)   Paul Walker via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Make validLookupTableConstant explicitly reject vector types. (PR #182555)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [llvm] [AMDGPU] Efficient way to get NumArchVGPRs. (PR #182537)   via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrti to header-only (PR #177960)   Vedant Neve via llvm-commits
• [llvm] 874c8b6 - Revert "[X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1))" (#182545)   via llvm-commits
• [llvm] Revert "[X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1))" (PR #182545)   Simon Pilgrim via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Derek Schuff via llvm-commits
• [llvm] ceb3b4c - Re-enable MSVC C4592 diagnostic; NFC (#182503)   via llvm-commits
• [llvm] Re-enable MSVC C4592 diagnostic; NFC (PR #182503)   Aaron Ballman via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Xavier Roche via llvm-commits
• [llvm] [Support][NFC] Avoid weak vtable warning for JSON ParseError (PR #182511)   Mikael Holmen via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Tim Gymnich via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Tim Gymnich via llvm-commits
• [llvm] 6c3cfb6 - [NCFI][OpenMPIRBuilderTest] remove some trivial uses of getAllocatedType (#181722)   via llvm-commits
• [llvm] [NCFI][OpenMPIRBuilderTest] remove some trivial uses of getAllocatedType (PR #181722)   Jameson Nash via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [RISCV] Pre-commit tests for #182389 (PR #182558)   Craig Topper via llvm-commits
• [llvm] [RISCV] Pre-commit tests for #182389 (PR #182558)   via llvm-commits
• [llvm] 3219229 - [X86] matchPMADDWD - reduce code duplication and use ISD::matchUnaryPredicate to check shift amount range. NFC. (#182548)   via llvm-commits
• [llvm] [X86] matchPMADDWD - reduce code duplication and use ISD::matchUnaryPredicate to check shift amount range. NFC. (PR #182548)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   Aiden Grossman via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   Daniil Kovalev via llvm-commits
• [llvm] [AMDGPU] Efficient way to get NumArchVGPRs. (PR #182537)   Sirish Pande via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Steven Perron via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] [NFC][CodeGen] Add Register guard to ARMMaterializeFP. (PR #182559)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Fold v_perm pair into v_swap (PR #181966)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Craig Topper via llvm-commits
• [llvm] [NFC][CodeGen] Add Register guard to ARMMaterializeFP. (PR #182559)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [DAG] Propagate OrZero and DemandedElts for min/max in isKnownToBeAPowerOfTwo (PR #182369)   Craig Topper via llvm-commits
• [llvm] [UTC] Add utility script to deal with conflicting RUN lines (PR #182546)   Jameson Nash via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addl implementation to header-only in src/__support/math folder. (PR #182561)   via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Paul Kirth via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addl implementation to header-only in src/__support/math folder. (PR #182561)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Xavier Roche via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addl implementation to header-only in src/__support/math folder. (PR #182561)   via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addl implementation to header-only in src/__support/math folder. (PR #182561)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   Jakub Kuderski via llvm-commits
• [llvm] [PowerPC] using milicode call for memccpy instead of lib call (PR #182563)   zhijian lin via llvm-commits
• [llvm] [AMDGPU] Efficient way to get NumArchVGPRs. (PR #182537)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for memccpy instead of lib call (PR #182563)   via llvm-commits
• [llvm] [PowerPC] using milicode call for memccpy instead of lib call (PR #182563)   via llvm-commits
• [llvm] Re-enable MSVC C4706 diagnostic; NFC (PR #182564)   Aaron Ballman via llvm-commits
• [llvm] 494bc4c - [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (#179572)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jameson Nash via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   Craig Topper via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] Replace getAllocatedType with careful tracking (PR #181845)   Jameson Nash via llvm-commits
• [llvm] [LLVM][AArch64] Allow vector converts to run in streaming mode with … (PR #177375)   via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Kai Nacke via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [RISCV] Pre-commit tests for #182389 (PR #182558)   Sam Elliott via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Kai Nacke via llvm-commits
• [llvm] [RISCV] Pre-commit tests for #182389 (PR #182558)   Simon Pilgrim via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Finn Plummer via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Finn Plummer via llvm-commits
• [llvm] IR: Add prefalign attribute for function definitions. (PR #155527)   Peter Collingbourne via llvm-commits
• [llvm] IR: Add prefalign attribute for function definitions. (PR #155527)   Peter Collingbourne via llvm-commits
• [llvm] IR: Add prefalign attribute for function definitions. (PR #155527)   Peter Collingbourne via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [llvm] 943504e - IR: Add prefalign attribute for function definitions.   via llvm-commits
• [llvm] IR: Add prefalign attribute for function definitions. (PR #155527)   Peter Collingbourne via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Steven Perron via llvm-commits
• [clang] [llvm] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Krzysztof Drewniak via llvm-commits
• [llvm] Re-enable MSVC C4706 diagnostic; NFC (PR #182564)   Aaron Ballman via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [llvm] [TableGen][RISCV] Avoid using operator< on bools in SearchableTable lookup functions. (PR #182553)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Kavin Gnanapandithan via llvm-commits
• [llvm] [ThinLTO][MemProf] Support remark emission for thin link and use in MemProf (PR #182570)   Teresa Johnson via llvm-commits
• [llvm] [ThinLTO][MemProf] Support remark emission for thin link and use in MemProf (PR #182570)   via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   Paul Kirth via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Kirill Vedernikov via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Vitaly Buka via llvm-commits
• [llvm] [LoopFusion] Improve collectFusionCandidates() (PR #182571)   Ehsan Amiri via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Joshua Batista via llvm-commits
• [llvm] 763fbee - [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (#182003)   via llvm-commits
• [llvm] [LoopFusion] Improve collectFusionCandidates() (PR #182571)   via llvm-commits
• [lldb] [llvm] [CI][lldb] Add a github workflow that runs pylint on LLDB API test changes (PR #182003)   Michael Buch via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Sam Elliott via llvm-commits
• [clang] [libc] [llvm] [libc] Add basic support for building SPIR-V libraries (PR #181049)   Michael Jones via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [clang] [libc] [llvm] [libc] Add basic support for building SPIR-V libraries (PR #181049)   Joseph Huber via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Finn Plummer via llvm-commits
• [llvm] [AMDGPU] Make .amdhsa_next_free_sgpr optional for GFX10+ (PR #182517)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Finn Plummer via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Kavin Gnanapandithan via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] [CMake] Re-enable LIBCXX_HARDENING_MODE for assert build (PR #182383)   LLVM Continuous Integration via llvm-commits
• [llvm] [TableGen][RISCV] Avoid using operator< on bools in SearchableTable lookup functions. (PR #182553)   Craig Topper via llvm-commits
• [llvm] ebe9c6e - CodeGen: Introduce MachineFunction::getPreferredAlignment().   via llvm-commits
• [clang] [llvm] CodeGen: Introduce MachineFunction::getPreferredAlignment(). (PR #158368)   Peter Collingbourne via llvm-commits
• [clang] [llvm] CodeGen: Introduce MachineFunction::getPreferredAlignment(). (PR #158368)   Peter Collingbourne via llvm-commits
• [llvm] [RISCV] Pre-commit CLMUL tests for #182389 (PR #182558)   Craig Topper via llvm-commits
• [llvm] [RISCV] Pre-commit CLMUL tests for #182389 (PR #182558)   Craig Topper via llvm-commits
• [llvm] 3a30812 - [RISCV] Pre-commit tests for #182389 (#182558)   via llvm-commits
• [llvm] fef1c43 - [gn build] Port 32392468d7139   Peter Collingbourne via llvm-commits
• [llvm] 847608c - [gn build] Port 41c6aa67a3430   Peter Collingbourne via llvm-commits
• [llvm] 13948d7 - [gn build] Port 7c3c9c45f85da   Peter Collingbourne via llvm-commits
• [llvm] ce1628c - [gn build] Port 8f378ea7e6fa3   Peter Collingbourne via llvm-commits
• [llvm] fec29b3 - [gn build] Port 98c76d36432cc   Peter Collingbourne via llvm-commits
• [llvm] a5fc887 - [gn build] Port d7a24d30f62bc   Peter Collingbourne via llvm-commits
• [llvm] 11ddece - [gn build] Port f6c86bd69d92e   Peter Collingbourne via llvm-commits
• [llvm] [TableGen][RISCV] Avoid using operator< on bools in SearchableTable lookup functions. (PR #182553)   Rahul Joshi via llvm-commits
• [llvm] Re-enable MSVC C4706 diagnostic; NFC (PR #182564)   Hans Wennborg via llvm-commits
• [llvm] [RISCV] Use bits<1> for AltFmt in RISCVVPseudo. (PR #182581)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use bits<1> for AltFmt in RISCVVPseudo. (PR #182581)   via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Derek Schuff via llvm-commits
• [llvm] [RISCV] Use bits<1> for AltFmt in RISCVVPseudo. (PR #182581)   Craig Topper via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   Mehdi Amini via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] Re-enable MSVC C4091 diagnostic; NFC (PR #182500)   LLVM Continuous Integration via llvm-commits
• [llvm] [SandboxIR][Region] Replace exit() with reportFatalUsageError() (PR #182134)   via llvm-commits
• [clang] [llvm] [LFI] Add MCLFIRewriter infrastructure (PR #172906)   LLVM Continuous Integration via llvm-commits
• [llvm] [SandboxIR][Region] Replace exit() with reportFatalUsageError() (PR #182134)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Julian Pokrovsky via llvm-commits
• [llvm] [RISCV] Use bits<1> for AltFmt in RISCVVPseudo. (PR #182581)   Sam Elliott via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   via llvm-commits
• [llvm] AMDGPU: Perform libcall recognition to replace fast OpenCL pow (PR #182135)   Matt Arsenault via llvm-commits
• [llvm] [ThinLTO][MemProf] Support remark emission for thin link and use in MemProf (PR #182570)   Teresa Johnson via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   via llvm-commits
• [llvm] Remove whitespace on blank lines (PR #182574)   🍙 𝑹𝒖𝒓𝒊 🎋 via llvm-commits
• [llvm] [RISCV] Use bits<1> for AltFmt in RISCVVPseudo. (PR #182581)   Rahul Joshi via llvm-commits
• [llvm] [MC][Dwarf] Add custom CFI pseudo-ops for use in AMDGPU (PR #164721)   Scott Linder via llvm-commits
• [llvm] [LoopFusion] Improve collectFusionCandidates() (PR #182571)   Alireza Torabian via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [llvm] Re-enable MSVC C4141 diagnostic; NFC (PR #182586)   Aaron Ballman via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand part 2 (PR #180289)   Lei Huang via llvm-commits
• [llvm] 94724e8 - [LV] Add epilogue test with FindLast reduction of wrapping IV.   Florian Hahn via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Move debug records to correct blocks. (PR #157125)   via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand part 2 (PR #180289)   Lei Huang via llvm-commits
• [llvm] [bazel][NVVM][MLIR] Port 7d9b863bc39f690c6f7716dd27d24e6ccfcfae33 (PR #182588)   Jordan Rupprecht via llvm-commits
• [llvm] [LoopVectorize][LAA] Hoist load in memory IV to allow vectorization (PR #168312)   Raphael Moreira Zinsly via llvm-commits
• [llvm] [LoopFusion] Improve collectFusionCandidates() (PR #182571)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Julian Pokrovsky via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   via llvm-commits
• [llvm] [bazel][NVVM][MLIR] Port 7d9b863bc39f690c6f7716dd27d24e6ccfcfae33 (PR #182588)   Jordan Rupprecht via llvm-commits
• [llvm] [IndVarSimplify] Kept additional nuw and nsw flags during LinearFunctionTestReplace (PR #177433)   via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand part 2 (PR #180289)   via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand part 2 (PR #180289)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Matt Arsenault via llvm-commits
• [llvm] [LoopFusion] Improve collectFusionCandidates() (PR #182571)   Ehsan Amiri via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread pointer register on ARM Linux (PR #182438)   Igor Kudrin via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread pointer register on ARM Linux (PR #182438)   Igor Kudrin via llvm-commits
• [llvm] [LoopUnroll] Enhance the use of Optimization Remarks and `LLVM_DEBUG` (PR #178476)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Enhance the use of Optimization Remarks and `LLVM_DEBUG` (PR #178476)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Enhance the use of Optimization Remarks and `LLVM_DEBUG` (PR #178476)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole when lower 32 bits are masked away (PR #181238)   via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole when lower 32 bits are masked away (PR #181238)   via llvm-commits
• [llvm] 67fcdc9 - [AMDGPU] Efficient way to get NumArchVGPRs. (#182537)   via llvm-commits
• [llvm] [AMDGPU] Efficient way to get NumArchVGPRs. (PR #182537)   Sirish Pande via llvm-commits
• [llvm] [AMDGPU][ISel] Reduce 64-bit `setcc` to upper 32 bits if lower 32 bits are known (PR #181238)   via llvm-commits
• [llvm] Re-enable MSVC C4141 diagnostic; NFC (PR #182586)   via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   via llvm-commits
• [llvm] [PowerPC] Fix duplicate RUN lines in tests (PR #182275)   David Tenty via llvm-commits
• [llvm] [NFC] Re-enable* MSVC C4503 diagnostic (PR #182049)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   via llvm-commits
• [llvm] Fix comment in Delinearization.cpp/h (PR #182596)   Ruoyu Qiu via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Make validLookupTableConstant explicitly reject vector types. (PR #182555)   Nikita Popov via llvm-commits
• [llvm] Fix comment in Delinearization.cpp/h (PR #182596)   via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C), C)) used as czero.eqz/nez condition. (PR #182598)   Craig Topper via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr in amdgpu-codegenprepare (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Quentin Colombet via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Quentin Colombet via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Quentin Colombet via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Quentin Colombet via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Quentin Colombet via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   Quentin Colombet via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Craig Topper via llvm-commits
• [llvm] 4ce4987 - [VPlan] Optimize FindLast of FindIV w/o sentinel. (#172569)   via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Craig Topper via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Mikael Holmen via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Quentin Colombet via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Changpeng Fang via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Sam Elliott via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Changpeng Fang via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Sam Elliott via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Luisa Cicolini via llvm-commits
• [llvm] [DAGCombiner] Use APInt::isPower2() instead of popcount() == 1. NFC (PR #182600)   Craig Topper via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Luisa Cicolini via llvm-commits
• [llvm] [DAGCombiner] Use APInt::isPower2() instead of popcount() == 1. NFC (PR #182600)   via llvm-commits
• [llvm] [GISel] import pattern `(A-(B-C)) to A+(C-B)` (PR #181676)   Luisa Cicolini via llvm-commits
• [llvm] 2e88688 - [RISCV] Use bits<1> for AltFmt in RISCVVPseudo. (#182581)   via llvm-commits
• [llvm] [RISCV] Use bits<1> for AltFmt in RISCVVPseudo. (PR #182581)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Craig Topper via llvm-commits
• [compiler-rt] [scudo] Change header tagging for the secondary allocator (PR #182487)   Christopher Ferris via llvm-commits
• [llvm] [LLVM][ConstantFolding] Add vector ConstantInt/FP support to ReadDataFromGlobal. (PR #182530)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   via llvm-commits
• [llvm] [LLVM][ExecutionEngine] Add vector ConstantInt/FP support to getConstantValue(). (PR #182538)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Sam Elliott via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   Craig Topper via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Timothy Herchen via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Changpeng Fang via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Heejin Ahn via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   via llvm-commits
• [llvm] 580a3bb - [NFC][MC] Add LLVM_ABI annotations to createAsmParser functions (#182393)   via llvm-commits
• [llvm] [NFC][MC] Add LLVM_ABI annotations to createAsmParser functions (PR #182393)   Zachary Yedidia via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Craig Topper via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Erick Ochoa Lopez via llvm-commits
• [llvm] [IndVarSimplify] Kept additional nuw and nsw flags during LinearFunctionTestReplace (PR #177433)   via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   Vitaly Buka via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   Craig Topper via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   Craig Topper via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] 410c64e - AMDGPU: Try to fix leak in AMDGPULibFunc (#182583)   via llvm-commits
• [llvm] AMDGPU: Try to fix leak in AMDGPULibFunc (PR #182583)   Vitaly Buka via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] a412d73 - [AArch64][MachineOutliner] Clear debug locations on bundled instructions (#175655)   via llvm-commits
• [llvm] [AArch64][MachineOutliner] Clear debug locations on bundled instructions (PR #175655)   Amara Emerson via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [NFC][LFI] Reduce includes due to c-t impact (PR #182617)   Zachary Yedidia via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [NFC][LFI] Reduce includes due to c-t impact (PR #182617)   via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [clang] [llvm] [LFI] Add MCLFIRewriter infrastructure (PR #172906)   Zachary Yedidia via llvm-commits
• [llvm] [IndVarSimplify] Kept additional nuw and nsw flags during LinearFunctionTestReplace (PR #177433)   via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   Craig Topper via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   via llvm-commits
• [llvm] [flang][cuda] Use default stream when calling cudaStreamSynchronize without arg (PR #182623)   Slava Zakharin via llvm-commits
• [llvm] [flang][cuda] Use default stream when calling cudaStreamSynchronize without arg (PR #182623)   Slava Zakharin via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [flang][cuda] Use default stream when calling cudaStreamSynchronize without arg (PR #182623)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [flang][cuda] Use default stream when calling cudaStreamSynchronize without arg (PR #182623)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [flang][cuda] Use default stream when calling cudaStreamSynchronize without arg (PR #182623)   Valentin Clement バレンタイン クレメン via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Changpeng Fang via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   Craig Topper via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [InstCombine] Constant-fold riscv.vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [InstCombine] Constant-fold riscv.vmv.v.x (PR #182630)   via llvm-commits
• [llvm] [InstCombine] Constant-fold riscv.vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   via llvm-commits
• [llvm] [SimplifyCFG] remove misleading arrow operator (PR #182435)   Congcong Cai via llvm-commits
• [llvm] [InstCombine] Constant-fold riscv.vmv.v.x (PR #182630)   via llvm-commits
• [llvm] [InstCombine] Constant-fold riscv.vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Hubert Tong via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] Moved FunctionProperties test to correct test path (PR #182637)   Iñaki V Arrechea via llvm-commits
• [llvm] Moved FunctionProperties test to correct test path (PR #182637)   Iñaki V Arrechea via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Sam Clegg via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] [AArch64] materialized neon reg with movi (PR #182540)   Congcong Cai via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   Petr Penzin via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   Petr Penzin via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   Petr Penzin via llvm-commits
• [llvm] Moved FunctionProperties test to correct test path (PR #182637)   Iñaki V Arrechea via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread pointer register on ARM Linux (PR #182438)   Minsoo Choo via llvm-commits
• [llvm] 689ecf8 - [Hexagon] Handle subreg copies between DoubleRegs and IntRegs (#181360)   via llvm-commits
• [llvm] [Hexagon] Handle subreg copies between DoubleRegs and IntRegs (PR #181360)   Brian Cain via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Petr Penzin via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   Demetrius Kanios via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   Aiden Grossman via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   via llvm-commits
• [llvm] [ThinLTO][MemProf] Support remark emission for thin link and use in MemProf (PR #182570)   Snehasish Kumar via llvm-commits
• [llvm] Moved FunctionProperties test to correct test path (PR #182637)   Aiden Grossman via llvm-commits
• [llvm] Moved FunctionProperties test to correct test path (PR #182637)   Aiden Grossman via llvm-commits
• [llvm] [Hexagon] Handle subreg copies between DoubleRegs and IntRegs (PR #181360)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Sam Elliott via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Changpeng Fang via llvm-commits
• [llvm] 99dc561 - [AMDGPU] Use a general form of intrinsic for tensor load/store (#182334)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Use a general form of intrinsic for tensor load/store (PR #182334)   Changpeng Fang via llvm-commits
• [llvm] [SLP]Initial support for ordreded reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for ordreded reductions (PR #182644)   via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Craig Topper via llvm-commits
• [llvm] [SLP]Initial support for ordreded reductions (PR #182644)   via llvm-commits
• [llvm] [flang-rt] Temporarily disable destructor call in OwningPtr::delete_ptr. (PR #182635)   Slava Zakharin via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Craig Topper via llvm-commits
• [llvm] [SLP]Initial support for ordreded reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [flang-rt] Temporarily disable destructor call in OwningPtr::delete_ptr. (PR #182635)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Craig Topper via llvm-commits
• [llvm] [flang-rt] Temporarily disable destructor call in OwningPtr::delete_ptr. (PR #182635)   Slava Zakharin via llvm-commits
• [llvm] 594e9fb - [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (#182598)   via llvm-commits
• [llvm] [RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (PR #182598)   Craig Topper via llvm-commits
• [llvm] [mailmap] Map quicinc.com addresses to qti.qualcomm.com/oss.qualcomm.com; fix sort order (PR #181426)   via llvm-commits
• [llvm] [AMDGPU] Remove AMDGPUArgumentUsageInfo pass (PR #182490)   Dark Steve via llvm-commits
• [llvm] a2b7f1f - [ThinLTO][MemProf] Support remark emission for thin link and use in MemProf (#182570)   via llvm-commits
• [llvm] [ThinLTO][MemProf] Support remark emission for thin link and use in MemProf (PR #182570)   Teresa Johnson via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Weibo He via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Weibo He via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Weibo He via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Weibo He via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Craig Topper via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [flang-rt] Temporarily disable destructor call in OwningPtr::delete_ptr. (PR #182635)   Slava Zakharin via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   via llvm-commits
• [llvm] [flang-rt] Temporarily disable destructor call in OwningPtr::delete_ptr. (PR #182635)   Joseph Huber via llvm-commits
• [llvm] [flang-rt] Temporarily disable destructor call in OwningPtr::delete_ptr. (PR #182635)   Slava Zakharin via llvm-commits
• [llvm] bf83bbf - [SlotIndexes] Make IndexListEntry/slot constructor private   Aiden Grossman via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit test for COPY_SCC_VCC combine (PR #179351)   via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   via llvm-commits
• [llvm] [NFC][CodeGen] Rewrite comment for `getSubRegisterClass` (PR #182339)   Rahul Joshi via llvm-commits
• [llvm] [Hexagon] Fix hasFP to respect frame-pointer attribute unconditionally (PR #181524)   Ankit Aggarwal via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [llvm] [vim] Set commentstring for TableGen files (PR #182654)   Henry Baba-Weiss via llvm-commits
• [llvm] [vim] Set commentstring for TableGen files (PR #182654)   Henry Baba-Weiss via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Craig Topper via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Yingwei Zheng via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Constant-fold riscv.vmv.v.x (PR #182630)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   Yingwei Zheng via llvm-commits
• [llvm] Remove whitespace on blank lines (PR #182574)   🍙 𝑹𝒖𝒓𝒊 🎋 via llvm-commits
• [clang] [llvm] [clang] Simplify usage of FileManager::makeAbsolutePath (PR #182360)   LLVM Continuous Integration via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [InstCombine] Fix miscompilation for `select` + `FCmp` (PR #177872)   Tirthankar Mazumder via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   via llvm-commits
• [llvm] Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AArch64] Add clmuh/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   David Green via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [NFC][LFI] Reduce includes due to c-t impact (PR #182617)   Alexis Engelke via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] Re-enable MSVC C5105 diagnostic; NFC (PR #182524)   LLVM Continuous Integration via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Xavier Roche via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Xavier Roche via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Xavier Roche via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Yingwei Zheng via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Yingwei Zheng via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Yingwei Zheng via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   Demetrius Kanios via llvm-commits
• [llvm] 24b9655 - [NFC][LFI] Reduce includes due to c-t impact (#182617)   via llvm-commits
• [llvm] [NFC][LFI] Reduce includes due to c-t impact (PR #182617)   Zachary Yedidia via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   Nikita Popov via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   Nikita Popov via llvm-commits
• [llvm] Remove whitespace on blank lines (PR #182574)   🍙 𝑹𝒖𝒓𝒊 🎋 via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [llvm] [PatternMatch] Use APInt::tryZExtValue. NFC (PR #182618)   Nikita Popov via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Yingwei Zheng via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Yingwei Zheng via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [AArch64] Add clmuh/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add clmuh/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   via llvm-commits
• [libc] [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   via llvm-commits
• [libc] [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   Simon Pilgrim via llvm-commits
• [llvm] Attributor: Avoid calling identifyDefaultAbstractAttributes on declarations (PR #182663)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid calling identifyDefaultAbstractAttributes on declarations (PR #182663)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid calling identifyDefaultAbstractAttributes on declarations (PR #182663)   Matt Arsenault via llvm-commits
• [llvm] 1373aa0 - [AArch64] Add clmulh/r v16i8/v8i16/v4i32/v2i64 test coverage (#182305)   via llvm-commits
• [llvm] [AArch64] Add clmuh/r v16i8/v8i16/v4i32/v2i64 test coverage (PR #182305)   Simon Pilgrim via llvm-commits
• [llvm] Attributor: Avoid calling identifyDefaultAbstractAttributes on declarations (PR #182663)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   via llvm-commits
• [llvm] Clean vector clamps in X86 GISEL. (PR #182664)   via llvm-commits
• [llvm] Clean vector clamps in X86 GISEL. (PR #182664)   via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Yingwei Zheng via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Yingwei Zheng via llvm-commits
• [llvm] Clean vector clamps in X86 GISEL. (PR #182664)   via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` (PR #182502)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` (PR #182502)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` (PR #182502)   via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   Alex Duran via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   via llvm-commits
• [llvm] ce5c193 - [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (#182221)   via llvm-commits
• [llvm] [RISCV] Fold shladd into Xqcisls scaled load/store in RISCVMergeBaseOffset (PR #182221)   Sudharsan Veeravalli via llvm-commits
• [llvm] ValueTracking: Handle tracking nan through powi (PR #179311)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Handle tracking nan through powi (PR #179311)   Yingwei Zheng via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] 4a49122 - ValueTracking: Handle tracking nan through powi (#179311)   via llvm-commits
• [llvm] ValueTracking: Handle tracking nan through powi (PR #179311)   Matt Arsenault via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   Alex Duran via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Matt Arsenault via llvm-commits
• [llvm] [PatternMatch] Use APInt::tryZExtValue. NFC (PR #182618)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Use APInt::isPower2() instead of popcount() == 1. NFC (PR #182600)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Decompose icmp over min/max intrinsics when compared with a constant (PR #182461)   Yingwei Zheng via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Yingwei Zheng via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Nikita Popov via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Use bits<1> for AltFmt in RISCVVPseudo. (PR #182581)   Simon Pilgrim via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Simon Pilgrim via llvm-commits
• [llvm] b397c9d - FunctionAttrs: Basic propagation of nofpclass (#182444)   via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Matt Arsenault via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTENDAssertion failed for fpextdouble to x86 fp80 (PR #182660)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (PR #182660)   Benjamin Maxwell via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [InstCombine] Fix miscompilation for `select` + `FCmp` (PR #177872)   Yingwei Zheng via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Yingwei Zheng via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Yingwei Zheng via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Kshitij Paranjape via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   Jan Leyonberg via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   via llvm-commits
• [llvm] f1bfed1 - [ARM] support `r14` as an alias for `lr` in inline assembly (#179740)   via llvm-commits
• [llvm] [ARM] support `r14` as an alias for `lr` in inline assembly (PR #179740)   Folkert de Vries via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Yingwei Zheng via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   Joseph Huber via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [ARM] support `r14` as an alias for `lr` in inline assembly (PR #179740)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC] Simplify a RegisterInfoEmitter lit test (PR #182672)   Rahul Joshi via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   via llvm-commits
• [llvm] [Sparc] Set how many bytes load from or store to stack slot (PR #182674)   via llvm-commits
• [llvm] [Sparc] Set how many bytes load from or store to stack slot (PR #182674)   via llvm-commits
• [llvm] [Sparc] Set how many bytes load from or store to stack slot (PR #182674)   via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   Simon Pilgrim via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   Simon Pilgrim via llvm-commits
• [llvm] [SPARC] Set how many bytes load from or store to stack slot (PR #182674)   via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on VPOPCNTDQ targets (PR #182675)   Xavier Roche via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on targets with VPOPCNTDQ (PR #182547)   Xavier Roche via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on VPOPCNTDQ targets (PR #182675)   via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on VPOPCNTDQ targets (PR #182675)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   via llvm-commits
• [llvm] [X86] bitcnt-big-integer.ll - add non-VLX avx512vpopcntdq test coverage (PR #182676)   Simon Pilgrim via llvm-commits
• [llvm] [SPARC] Set how many bytes load from or store to stack slot (PR #182674)   via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on VPOPCNTDQ targets (PR #182675)   Simon Pilgrim via llvm-commits
• [llvm] c936398 - InstCombine: Add baseline test for fcmp-0-select combine (#172380)   via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fold absorbing fmul of compared 0 into select (PR #172381)   Matt Arsenault via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on VPOPCNTDQ targets (PR #182675)   Xavier Roche via llvm-commits
• [llvm] [LegalizeTypes] Use vector CTPOP for wide integer popcount on VPOPCNTDQ targets (PR #182675)   Xavier Roche via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   via llvm-commits
• [llvm] [InstCombine] Transform splat before n x i1 for vec.reduce.add (PR #182213)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Transform splat before n x i1 for vec.reduce.add (PR #182213)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC] Simplify a RegisterInfoEmitter lit test (PR #182672)   Rahul Joshi via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   Jakub Kuderski via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   Jakub Kuderski via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   Jakub Kuderski via llvm-commits
• [llvm] Attributor: Avoid calling identifyDefaultAbstractAttributes on declarations (PR #182663)   Shilei Tian via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Pradeep Kumar via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   Jakub Kuderski via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [SLP]Initial support for ordeded reductions (PR #182644)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Simon Pilgrim via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [TableGen] Add asserts for a few register related checks (PR #182680)   Rahul Joshi via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][RISCV] More fine-grained __global_pointer$ placement (PR #182029)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Enable declare_mapper support for target update (PR #182681)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Enable declare_mapper support for target update (PR #182681)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Enable declare_mapper support for target update (PR #182681)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Enable declare_mapper support for target update (PR #182681)   via llvm-commits
• [llvm] [X86] bitcnt-big-integer.ll - add non-VLX avx512vpopcntdq test coverage (PR #182676)   via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [SLP][NFC] Pre-commit tests for copyable element reordering (PR #182653)   Alexey Bataev via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] Fix compatibility issues with GCC15+ in C++23 (PR #182522)   via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] 8d3e6e7 - [InstCombine] Transform splat before n x i1 for vec.reduce.add (#182213)   via llvm-commits
• [llvm] [InstCombine] Transform splat before n x i1 for vec.reduce.add (PR #182213)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Transform splat before n x i1 for vec.reduce.add (PR #182213)   via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   Jinsong Ji via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [TableGen] Add asserts for a few register related checks (PR #182680)   Rahul Joshi via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Luke Lau via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Nikita Popov via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [llvm] [TableGen] Add asserts for a few register related checks (PR #182680)   via llvm-commits
• [llvm] [TableGen] Add asserts for a few register related checks (PR #182680)   via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
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• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   Aaron Siddhartha Mondal via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [Reassociate] Distribute multiply over add to enable factorization (PR #178201)   Yingwei Zheng via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   Osman Yasar via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   Osman Yasar via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Yingwei Zheng via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   Nikita Popov via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   via llvm-commits
• [llvm] [X86] bitcnt-big-integer.ll - add non-VLX avx512vpopcntdq test coverage (PR #182676)   Simon Pilgrim via llvm-commits
• [llvm] [X86] bitcnt-big-integer.ll - add non-VLX avx512vpopcntdq test coverage (PR #182676)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] InstCombine: Add baseline test for fcmp-0-select combine (PR #172380)   via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [InstCombine] Only ignore first zero index during GEP canonicalization (PR #180764)   Yingwei Zheng via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   Nikita Popov via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   Nikita Popov via llvm-commits
• [llvm] fe5096f - [PatternMatch] Use APInt::tryZExtValue. NFC (#182618)   via llvm-commits
• [llvm] [PatternMatch] Use APInt::tryZExtValue. NFC (PR #182618)   Craig Topper via llvm-commits
• [llvm] 15430ba - [DAGCombiner] Use APInt::isPower2() instead of popcount() == 1. NFC (#182600)   via llvm-commits
• [llvm] [DAGCombiner] Use APInt::isPower2() instead of popcount() == 1. NFC (PR #182600)   Craig Topper via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [NFC] Simplify a RegisterInfoEmitter lit test (PR #182672)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   Alex Duran via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [llvm] [X86] bitcnt-big-integer.ll - add non-VLX avx512vpopcntdq test coverage (PR #182676)   via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   LLVM Continuous Integration via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   LLVM Continuous Integration via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   LLVM Continuous Integration via llvm-commits
• [llvm] [OFFLOAD][L0] Remove leftover global constructor (#182611) (PR #182665)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (PR #182660)   via llvm-commits
• [llvm] 7a1c498 - [InstCombine] Update test   Aiden Grossman via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (PR #182660)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (PR #182660)   Benjamin Maxwell via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] Remove whitespace on blank lines (PR #182574)   Aiden Grossman via llvm-commits
• [llvm] Remove whitespace on blank lines (PR #182574)   Aiden Grossman via llvm-commits
• [llvm] Remove whitespace on blank lines (PR #182574)   via llvm-commits
• [llvm] [TableGen] Add OPC_EmitIntegerByHwMode0 and OPC_CheckChildXTypeByHwMode0. NFC (PR #182686)   Craig Topper via llvm-commits
• [llvm] [TableGen] Add OPC_EmitIntegerByHwMode0 and OPC_CheckChildXTypeByHwMode0. NFC (PR #182686)   via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [RISCV] Document some of the names we require for getNamedOperandIdx. NFC (PR #182687)   Craig Topper via llvm-commits
• [llvm] [RISCV] Document some of the names we require for getNamedOperandIdx. NFC (PR #182687)   via llvm-commits
• [llvm] [RISCV] Document some of the names we require for getNamedOperandIdx. NFC (PR #182687)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (PR #182660)   via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (PR #182660)   via llvm-commits
• [llvm] 6e0054a - [Scalarizer] Fix out-of-bounds crash (#180359)   via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   Nikita Popov via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [RISCV] Rename RVVConstraint->VS1VS2Constraint. NFC (PR #182688)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename RVVConstraint->VS1VS2Constraint. NFC (PR #182688)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Hubert Tong via llvm-commits
• [llvm] InstCombine: Fold absorbing fmul of compared 0 into select (PR #172381)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   via llvm-commits
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• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Osman Yasar via llvm-commits
• [llvm] InstCombine: Fold absorbing fmul of compared 0 into select (PR #172381)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid calling identifyDefaultAbstractAttributes on declarations (PR #182663)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc][math][c23] Implement higher math function `cbrtf16` in LLVM libc (PR #132484)   Krishna Pandey via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Osman Yasar via llvm-commits
• [llvm] [AVR] Fix SETUGT during 128b -> 64b lowering (PR #182690)   Patryk Wychowaniec via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Osman Yasar via llvm-commits
• [llvm] [AVR] Fix SETUGT during 128b -> 64b lowering (PR #182690)   Patryk Wychowaniec via llvm-commits
• [llvm] [GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (PR #181725)   Osman Yasar via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Matt Arsenault via llvm-commits
• [llvm] 18131dc - [ProfCheck] Exclude bitcode tests   Aiden Grossman via llvm-commits
• [llvm] 4846e3a - InstCombine: Fold absorbing fmul of compared 0 into select (#172381)   via llvm-commits
• [llvm] InstCombine: Fold absorbing fmul of compared 0 into select (PR #172381)   Matt Arsenault via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Aiden Grossman via llvm-commits
• [llvm] a6416a8 - [NFC] Simplify a RegisterInfoEmitter lit test (#182672)   via llvm-commits
• [llvm] [NFC] Simplify a RegisterInfoEmitter lit test (PR #182672)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [TableGen] Add asserts for a few register related checks (PR #182680)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add OPC_EmitIntegerByHwMode0 and OPC_CheckChildXTypeByHwMode0. NFC (PR #182686)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Victor Chernyakin via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Victor Chernyakin via llvm-commits
• [llvm] InstCombine: Add baseline test for nanless canonicalize combine (PR #172997)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] [lldb][bazel] Add HighlighterDefault, rename ClangHighlighter targets (PR #182693)   Kern Handa via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   Eric Christopher via llvm-commits
• [llvm] [CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (PR #179842)   Rahul Joshi via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] Removal of 20,000+ lines of trailing whitespace (PR #182689)   Victor Chernyakin via llvm-commits
• [llvm] [CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (PR #179842)   Eric Christopher via llvm-commits
• [llvm] [CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (PR #179842)   Rahul Joshi via llvm-commits
• [llvm] [CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (PR #179842)   Rahul Joshi via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] Revert "[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10" (PR #182695)   Rahul Joshi via llvm-commits
• [llvm] Revert "[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10" (PR #182695)   Rahul Joshi via llvm-commits
• [llvm] Revert "[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10" (PR #182695)   Eric Christopher via llvm-commits
• [llvm] Revert "[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10" (PR #182695)   Eric Christopher via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [TableGen] Add OPC_EmitIntegerByHwMode0 and OPC_CheckChildXTypeByHwMode0. NFC (PR #182686)   Rahul Joshi via llvm-commits
• [llvm] [ARM] Lower abds and abdu on ARM (PR #158734)   via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [X86] bitcnt-big-integer.ll - add non-VLX avx512vpopcntdq test coverage (PR #182676)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   Hassnaa Hamdi via llvm-commits
• [llvm] Revert "[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10" (PR #182695)   Eric Christopher via llvm-commits
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• [llvm] 8e22227 - Revert "[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10" (#182695)   via llvm-commits
• [llvm] Revert "[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10" (PR #182695)   Eric Christopher via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   via llvm-commits
• [llvm] 4ec0c73 - [Hexagon] Fix hasFP to respect frame-pointer attribute unconditionally (#181524)   via llvm-commits
• [llvm] [Hexagon] Fix hasFP to respect frame-pointer attribute unconditionally (PR #181524)   Brian Cain via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Victor Chernyakin via llvm-commits
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• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   Aiden Grossman via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
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• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   Simon Pilgrim via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   Simon Pilgrim via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182333)   Demetrius Kanios via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   Demetrius Kanios via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Sam Clegg via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Aiden Grossman via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   Aiden Grossman via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Aiden Grossman via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   Aiden Grossman via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Demetrius Kanios via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Demetrius Kanios via llvm-commits
• [llvm] [mlir] [RFC][TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Nikita Popov via llvm-commits
• [llvm] [mlir] [RFC][TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Baranov Victor via llvm-commits
• [llvm] 567a546 - Clean vector clamps in X86 GlobalISel. (#182664)   via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   Simon Pilgrim via llvm-commits
• [llvm] Clean vector clamps in X86 GlobalISel. (PR #182664)   via llvm-commits
• [llvm] [mlir] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [mlir] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [mlir] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] [X86] bitcnt-big-integer.ll - add non-VLX avx512vpopcntdq test coverage (PR #182676)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   Aiden Grossman via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Victor Chernyakin via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [llvm] 5e0ef90 - [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (#180637)   via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   Jin Huang via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Jakub Kuderski via llvm-commits
• [llvm] [profcheck][CVP] Adding 'unknown' branch weights for `urem` expansion in CVP (PR #180637)   LLVM Continuous Integration via llvm-commits
• [llvm] Custom Lower ABDU on PowerPC (PR #182704)   via llvm-commits
• [llvm] Custom Lower ABDU on PowerPC (PR #182704)   via llvm-commits
• [llvm] [PowerPC] Custom Lower ABDU (PR #182704)   via llvm-commits
• [llvm] [PowerPC] Custom Lower ABDU using branchless carry (PR #182704)   via llvm-commits
• [llvm] [BOLT] Always place new PT_LOAD after existing ones (PR #182642)   Maksim Panchenko via llvm-commits
• [llvm] [PowerPC] Custom Lower ABDU using branchless carry (PR #182704)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   Aiden Grossman via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   Aiden Grossman via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for NVPTX target lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][CUDA][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   dan rouhana via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Victor Chernyakin via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Vitaly Buka via llvm-commits
• [llvm] [TableGen] Add asserts for a few register related checks (PR #182680)   Sam Elliott via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Vitaly Buka via llvm-commits
• [llvm] [TableGen] Add OPC_EmitIntegerByHwMode0 and OPC_CheckChildXTypeByHwMode0. NFC (PR #182686)   Sam Elliott via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [TableGen] Add OPC_EmitIntegerByHwMode0 and OPC_CheckChildXTypeByHwMode0. NFC (PR #182686)   Sam Elliott via llvm-commits
• [llvm] c6ade8a - [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (#182660)   via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (PR #182660)   Benjamin Maxwell via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Jakub Kuderski via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   Aiden Grossman via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   via llvm-commits
• [llvm] fdce869 - [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (#182694)   via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   Aiden Grossman via llvm-commits
• [llvm] [PowerPC] Custom Lower ABDU using branchless carry (PR #182704)   via llvm-commits
• [llvm] [llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (PR #182694)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Vitaly Buka via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   Aiden Grossman via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Alexander Yermolovich via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Alexander Yermolovich via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Alexander Yermolovich via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   Aiden Grossman via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   Aiden Grossman via llvm-commits
• [llvm] 9d9c7fc - [lldb][Process/FreeBSDKernel] Print unread message buffer on start (#178027)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Print unread message buffer on start (PR #178027)   via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Shilei Tian via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Fangrui Song via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [lld] c04b00d - [ELF] Add target-specific relocation scanning for ARM (#182440)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Shilei Tian via llvm-commits
• [llvm] [PowerPC] Use setb to implement ucmp and scmp (PR #182714)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Vitaly Buka via llvm-commits
• [llvm] [PowerPC] Use setb to implement ucmp and scmp (PR #182714)   via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   via llvm-commits
• [llvm] [PowerPC] Use setb to implement ucmp and scmp (PR #182714)   via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Victor Chernyakin via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   via llvm-commits
• [llvm] [SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (PR #182660)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Victor Chernyakin via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   LLVM Continuous Integration via llvm-commits
• [llvm] [PowerPC] Use setb to implement ucmp and scmp (PR #182714)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for LoongArch (PR #182236)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for LoongArch (PR #182236)   via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Yanzuo Liu via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for ordeded reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [SPARC] Set how many bytes load from or store to stack slot (PR #182674)   via llvm-commits
• [llvm] d5b9417 - [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (#182692)   via llvm-commits
• [llvm] [LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (PR #182692)   Victor Chernyakin via llvm-commits
• [llvm] [TableGen] Add asserts for a few register related checks (PR #182680)   Craig Topper via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to addrecs wrap (NFC) (PR #179683)   LLVM Continuous Integration via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   via llvm-commits
• [llvm] [AMDGPU] Remove target feature `DumpCodeLower` (PR #176960)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove target feature `DumpCodeLower` (PR #176960)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove `FeaturePromoteAlloca` (PR #177636)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove `FeaturePromoteAlloca` (PR #177636)   Shilei Tian via llvm-commits
• [llvm] [SPARC] Set how many bytes load from or store to stack slot (PR #182674)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Vitaly Buka via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Aiden Grossman via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Vitaly Buka via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16fma to Header Only (PR #182572)   Muhammad Bassiouni via llvm-commits
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• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
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• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
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• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
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• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
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• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   LLVM Continuous Integration via llvm-commits
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• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Nikita Popov via llvm-commits
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• [llvm] 1161d07 - [GlobalISel] Add sub_same_val rewrites from SelectionDAG (#181134)   via llvm-commits
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• [llvm] [AVR] Fix SETUGT during 128b -> 64b lowering (PR #182690)   Sergei Barannikov via llvm-commits
• [llvm] 1bf4ca3 - [GlobalISel] Add sub_one_from_sub from SelectionDAG (#181670)   via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   Arjun Pitchanathan via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Remove AMDGPUArgumentUsageInfo pass (PR #182490)   Shilei Tian via llvm-commits
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• [llvm] [WIP][AMDGPU] Improve the handling of `inreg` arguments (PR #133614)   Shilei Tian via llvm-commits
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• [llvm] [SDAG][abd] Remove duplicate legality check (PR #181538)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][AMDGPU] Improve the handling of `inreg` arguments (PR #133614)   Shilei Tian via llvm-commits
• [llvm] [WIP][AMDGPU] Improve the handling of `inreg` arguments (PR #133614)   Shilei Tian via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
• [llvm] [WIP][AMDGPU] Improve the handling of `inreg` arguments (PR #133614)   Shilei Tian via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Simon Pilgrim via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   LLVM Continuous Integration via llvm-commits
• [llvm] [AVR] Fix SETUGT during 128b -> 64b lowering (PR #182690)   Patryk Wychowaniec via llvm-commits
• [llvm] [AVR] Fix SETUGT during 128b -> 64b lowering (PR #182690)   Patryk Wychowaniec via llvm-commits
• [llvm] [DataLayout] Add byte specification (PR #106536)   Sergei Barannikov via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   via llvm-commits
• [llvm] [GlobalISel] Add sub_one_from_sub from SelectionDAG (PR #181670)   LLVM Continuous Integration via llvm-commits
• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   Florian Hahn via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Eli Friedman via llvm-commits
• [llvm] [TableGen] Implement TypesAreContradictory for non-simple ValueTypeByHwMode. (PR #182765)   Craig Topper via llvm-commits
• [llvm] [TableGen] Implement TypesAreContradictory for non-simple ValueTypeByHwMode. (PR #182765)   via llvm-commits
• [llvm] [TableGen] Implement TypesAreContradictory for non-simple ValueTypeByHwMode. (PR #182765)   via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
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• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   Florian Hahn via llvm-commits
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• [llvm] 1dcaf47 - [IVDescriptors] Identify min/max recurrences in single pass. (#163460)   via llvm-commits
• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   Florian Hahn via llvm-commits
• [llvm] Revert "[InstCombine] Allow freezing multiple operands (#154336)" (PR #182769)   Eli Friedman via llvm-commits
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• [llvm] Revert "[InstCombine] Allow freezing multiple operands (#154336)" (PR #182769)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
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• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Alexey Moksyakov via llvm-commits
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• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Eli Friedman via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   via llvm-commits
• [llvm] [TableGen] Implement TypesAreContradictory for non-simple ValueTypeByHwMode. (PR #182765)   via llvm-commits
• [llvm] Revert "[InstCombine] Allow freezing multiple operands (#154336)" (PR #182769)   Eli Friedman via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   Craig Topper via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [DAGCombiner] Add legality check for CLMULR fold to prevent infinite … (PR #182376)   via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   LLVM Continuous Integration via llvm-commits
• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   LLVM Continuous Integration via llvm-commits
• [llvm] [TableGen] Implement TypesAreContradictory for non-simple ValueTypeByHwMode. (PR #182765)   Sam Elliott via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] 57f4861 - [LV] Add additional tests for FP argmin/argmax.   Florian Hahn via llvm-commits
• [llvm] 37a32d4 - [ARM] Regenerate bfx.ll and pr35836.ll tests. NFC   David Green via llvm-commits
• [llvm] 690312e - [LV] Add additional find-last reduction tests with sink-able exprs.   Florian Hahn via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   David Green via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Alex Reinking via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Min-Yih Hsu via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] [SPIR-V] Don't add alignment decoration emitted for non-kernel SPIR-V (PR #182772)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't add alignment decoration emitted for non-kernel SPIR-V (PR #182772)   via llvm-commits
• [llvm] [CodeGen][NewPM] Name parameters in buildCodeGenPipeline (PR #182774)   Aiden Grossman via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   via llvm-commits
• [llvm] [SPIRV] Fix non-deterministic compiler output for debug type pointer (PR #182773)   via llvm-commits
• [llvm] [SPIRV] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Mikołaj Piróg via llvm-commits
• [llvm] bd3b163 - Revert "[InstCombine] Allow freezing multiple operands (#154336)" (#182769)   via llvm-commits
• [llvm] Revert "[InstCombine] Allow freezing multiple operands (#154336)" (PR #182769)   Eli Friedman via llvm-commits
• [llvm] Revert "[InstCombine] Allow freezing multiple operands (#154336)" (PR #182769)   Eli Friedman via llvm-commits
• [llvm] Revert "[InstCombine] Allow freezing multiple operands (#154336)" (PR #182769)   Eli Friedman via llvm-commits
• [llvm] [BPF] Fix crash on unsupported atomic operations (PR #182778)   Tal Zussman via llvm-commits
• [llvm] [BPF] Fix crash on unsupported atomic operations (PR #182778)   via llvm-commits
• [llvm] [BPF] Fix crash on unsupported atomic operations (PR #182778)   Tal Zussman via llvm-commits
• [llvm] Revert "[InstCombine] Allow freezing multiple operands (#154336)" (PR #182769)   via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Eli Friedman via llvm-commits
• [llvm] [Hexagon] Add HexagonGlobalScheduler pass (#180803) (PR #181961)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIR-V] Don't add alignment decoration emitted for non-kernel SPIR-V (PR #182772)   Dmitry Sidorov via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   Eli Friedman via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Maksim Levental via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize and fold (PR #182782)   via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize and fold (PR #182782)   via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   Folkert de Vries via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-82-g38cf72a4 (PR #182786)   Michael Kruse via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-82-g38cf72a4 (PR #182786)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [polly] 8e8974e - [Polly] Update isl to isl-0.27-82-g38cf72a4 (#182786)   via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-82-g38cf72a4 (PR #182786)   Michael Kruse via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   via llvm-commits
• [llvm] [Support] Improve the logic for re-raising signals (PR #177864)   Alex Rønne Petersen via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] [X86][GISEL] Port X86PostLegalizerCombiner to npm (PR #182787)   Gergo Stomfai via llvm-commits
• [llvm] [X86][GISEL] Port X86PostLegalizerCombiner to npm (PR #182787)   Gergo Stomfai via llvm-commits
• [llvm] [X86][GISEL] Port X86PostLegalizerCombiner to npm (PR #182787)   via llvm-commits
• [llvm] [X86][GISEL] Port X86PostLegalizerCombiner to npm (PR #182787)   via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Combine to sqxtn pre legalization for FewerElements (PR #181163)   Amara Emerson via llvm-commits
• [llvm] [TableGen] Implement TypesAreContradictory for non-simple ValueTypeByHwMode. (PR #182765)   Craig Topper via llvm-commits
• [llvm] [SPIR-V] Don't add alignment decoration emitted for non-kernel SPIR-V (PR #182772)   Steven Perron via llvm-commits
• [llvm] 384106b - [RISCV] Update Andes45 vector floating-point arithmetic scheduling info (#181289)   via llvm-commits
• [llvm] [RISCV] Update Andes45 vector floating-point arithmetic scheduling info (PR #181289)   Jim Lin via llvm-commits
• [llvm] 0285308 - [CodeGen][NewPM] Name parameters in buildCodeGenPipeline   via llvm-commits
• [llvm] [CodeGen][NewPM] Name parameters in buildCodeGenPipeline (PR #182774)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   Craig Topper via llvm-commits
• [llvm] 2617cc5 - [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (#182389)   via llvm-commits
• [llvm] [VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (PR #181789)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (PR #181789)   Luke Lau via llvm-commits
• [llvm] [TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (PR #182389)   LLVM Continuous Integration via llvm-commits
• [llvm] ff88b83 - [VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (#181789)   via llvm-commits
• [llvm] [VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (PR #181789)   Luke Lau via llvm-commits
• [llvm] [NFCi][AsmPrinter] Refactor getting analyses to callbacks (PR #182793)   Aiden Grossman via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [NFCi][AsmPrinter] Refactor getting analyses to callbacks (PR #182793)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove verifyEVLRecipe (PR #182798)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove verifyEVLRecipe (PR #182798)   via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   via llvm-commits
• [llvm] [X86] Attempt to use VPMADD52L/VPMULUDQ instead of VPMULLQ on slow VPMULLQ targets (or when VPMULLQ is unavailable) (PR #171760)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [X86] Attempt to use VPMADD52L/VPMULUDQ instead of VPMULLQ on slow VPMULLQ targets (or when VPMULLQ is unavailable) (PR #171760)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [RISCV] Reduce duplicated SFB patterns in RISCVInstrInfoXAndes.td. NFC. (PR #182800)   Jim Lin via llvm-commits
• [llvm] [RISCV] Reduce duplicated SFB patterns in RISCVInstrInfoXAndes.td. NFC. (PR #182800)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [NFC][AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Shilei Tian via llvm-commits
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• [llvm] [NFC][AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Shilei Tian via llvm-commits
• [llvm] [X86][GISEL] Enable PostLegalize Combiner (PR #174696)   via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Brad Smith via llvm-commits
• [llvm] [RISCV] Reduce duplicated SFB patterns in RISCVInstrInfoXAndes.td. NFC. (PR #182800)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Reduce duplicated SFB patterns in RISCVInstrInfoXAndes.td. NFC. (PR #182800)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Reduce duplicated SFB patterns in RISCVInstrInfoXAndes.td. NFC. (PR #182800)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Sam Elliott via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] c4e26ae - [RISCV] Reduce duplicated SFB patterns in RISCVInstrInfoXAndes.td. NFC. (#182800)   via llvm-commits
• [llvm] [RISCV] Reduce duplicated SFB patterns in RISCVInstrInfoXAndes.td. NFC. (PR #182800)   Jim Lin via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [SPIR-V] Don't emit alignment decoration for non-kernel SPIR-V (PR #182772)   Dmitry Sidorov via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Jim Lin via llvm-commits
• [llvm] 9a109fb - [SPIR-V] Don't emit alignment decoration for non-kernel SPIR-V (#182772)   via llvm-commits
• [llvm] [SPIR-V] Don't emit alignment decoration for non-kernel SPIR-V (PR #182772)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [M68k] Update llvm/test/CodeGen/M68k/pipeline.ll (PR #182809)   Jim Lin via llvm-commits
• [llvm] [M68k] Update llvm/test/CodeGen/M68k/pipeline.ll (PR #182809)   via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   via llvm-commits
• [llvm] [AMDGPU] Fold v_perm pair into v_swap (PR #181966)   Frederick Vu via llvm-commits
• [llvm] [AMDGPU] Add VOP2 to gfx13 (PR #182812)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VOP2 to gfx13 (PR #182812)   via llvm-commits
• [llvm] [AMDGPU] Add VOPD to gfx13 (PR #182815)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VOPD to gfx13 (PR #182815)   via llvm-commits
• [lld] LLD is unable to link musl for x32 - only for DSOs. static linking wa… (PR #182419)   Fangrui Song via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Abhinav Gaba via llvm-commits
• [llvm] [TableGen] fix unreachable code warning in *GenSubtargetInfo.inc files (PR #182477)   Rafał Rudnicki via llvm-commits